From: Marc Zyngier <email@example.com> To: Ricardo Koller <firstname.lastname@example.org> Cc: Zenghui Yu <email@example.com>, Auger Eric <firstname.lastname@example.org>, email@example.com, firstname.lastname@example.org, email@example.com, firstname.lastname@example.org, email@example.com Subject: Re: [PATCH v2 4/5] KVM: selftests: Add exception handling support for aarch64 Date: Wed, 12 May 2021 17:18:42 +0100 [thread overview] Message-ID: <firstname.lastname@example.org> (raw) In-Reply-To: <YJv8NUtKilXPDYpY@google.com> On 2021-05-12 17:03, Ricardo Koller wrote: > On Wed, May 12, 2021 at 02:43:28PM +0100, Marc Zyngier wrote: >> On 2021-05-12 13:59, Zenghui Yu wrote: >> > Hi Eric, >> > >> > On 2021/5/6 20:30, Auger Eric wrote: >> > > running the test on 5.12 I get >> > > >> > > ==== Test Assertion Failure ==== >> > > aarch64/debug-exceptions.c:232: false >> > > pid=6477 tid=6477 errno=4 - Interrupted system call >> > > 1 0x000000000040147b: main at debug-exceptions.c:230 >> > > 2 0x000003ff8aa60de3: ?? ??:0 >> > > 3 0x0000000000401517: _start at :? >> > > Failed guest assert: hw_bp_addr == PC(hw_bp) at >> > > aarch64/debug-exceptions.c:105 >> > > values: 0, 0x401794 >> > >> > FYI I can also reproduce it on my VHE box. And Drew's suggestion [*] >> > seemed to work for me. Is the ISB a requirement of architecture? >> >> Very much so. Given that there is no context synchronisation (such as >> ERET or an interrupt) in this code, the CPU is perfectly allowed to >> delay the system register effect as long as it can. >> >> M. >> -- >> Jazz is not dead. It just smells funny... > > Thank you very much Eric, Zenghui, Marc, and Andrew (for the ISB > suggestion)! > > As per Zenghui test, will send a V3 that includes the missing ISBs. > Hopefully that will fix the issue for Eric as well. It's very > interesting that the CPU seems to _always_ reorder those instructions. I suspect that because hitting the debug registers can be a costly operation (it mobilises a lot of resources in the CPU), there is a strong incentive to let it slide until there is an actual mandate to commit the resource. It also means that SW can issue a bunch of these without too much overhead, and only pay the cost *once*. Your N1 CPU seems to be less aggressive on this. Implement choice, I'd say (it probably is more aggressive than TX2 on other things). Also, QEMU will almost always hide these problems, due to the nature of TCG. Thanks, M. -- Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2021-05-12 17:41 UTC|newest] Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-04-30 23:24 [PATCH v2 0/5] KVM: selftests: arm64 exception handling and debug test Ricardo Koller 2021-04-30 23:24 ` [PATCH v2 1/5] KVM: selftests: Rename vm_handle_exception Ricardo Koller 2021-05-03 11:02 ` Andrew Jones 2021-05-06 12:27 ` Auger Eric 2021-04-30 23:24 ` [PATCH v2 2/5] KVM: selftests: Introduce UCALL_UNHANDLED for unhandled vector reporting Ricardo Koller 2021-05-03 11:09 ` Andrew Jones 2021-05-06 12:27 ` Auger Eric 2021-04-30 23:24 ` [PATCH v2 3/5] KVM: selftests: Move GUEST_ASSERT_EQ to utils header Ricardo Koller 2021-05-03 11:31 ` Andrew Jones 2021-04-30 23:24 ` [PATCH v2 4/5] KVM: selftests: Add exception handling support for aarch64 Ricardo Koller 2021-05-03 10:32 ` Marc Zyngier 2021-05-03 19:12 ` Ricardo Koller 2021-05-06 12:30 ` Auger Eric 2021-05-06 19:14 ` Ricardo Koller 2021-05-07 14:08 ` Auger Eric 2021-05-07 17:54 ` Ricardo Koller 2021-05-12 7:27 ` Ricardo Koller 2021-05-12 8:19 ` Auger Eric 2021-05-12 8:33 ` Marc Zyngier 2021-05-12 8:52 ` Auger Eric 2021-05-12 16:06 ` Ricardo Koller 2021-05-12 12:59 ` Zenghui Yu 2021-05-12 13:43 ` Marc Zyngier 2021-05-12 16:03 ` Ricardo Koller 2021-05-12 16:18 ` Marc Zyngier [this message] 2021-05-12 21:39 ` Ricardo Koller 2021-05-07 14:31 ` Marc Zyngier 2021-05-07 18:02 ` Ricardo Koller 2021-05-03 12:39 ` Andrew Jones 2021-04-30 23:24 ` [PATCH v2 5/5] KVM: selftests: Add aarch64/debug-exceptions test Ricardo Koller 2021-05-03 12:49 ` Andrew Jones 2021-05-24 12:14 ` [PATCH v2 0/5] KVM: selftests: arm64 exception handling and debug test Paolo Bonzini 2021-05-24 12:59 ` Marc Zyngier
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