From: Paul Walmsley <paul.walmsley@sifive.com>
To: Anup Patel <anup@brainfault.org>
Cc: Palmer Dabbelt <palmer@sifive.com>,
Anup Patel <Anup.Patel@wdc.com>,
Paolo Bonzini <pbonzini@redhat.com>, Radim K <rkrcmar@redhat.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Alexander Graf <graf@amazon.com>,
Atish Patra <Atish.Patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Damien Le Moal <Damien.LeMoal@wdc.com>,
Christoph Hellwig <hch@infradead.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v9 01/22] RISC-V: Add bitmap reprensenting ISA features common across CPUs
Date: Fri, 25 Oct 2019 16:30:59 -0700 (PDT) [thread overview]
Message-ID: <alpine.DEB.2.21.9999.1910251629540.12828@viisi.sifive.com> (raw)
In-Reply-To: <CAAhSdy3xV0UjDKUgHoKbyoeV5kaC9rVSy=qoBpF=XrrbT=W=-Q@mail.gmail.com>
On Thu, 17 Oct 2019, Anup Patel wrote:
> Can you consider this patch for Linux-5.4-rcX ??
Unless another user of the riscv_isa bitmap comes along, it seems best
merged along with its user: the RISC-V KVM patches.
- Paul
next prev parent reply other threads:[~2019-10-25 23:31 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-16 16:08 [PATCH v9 00/22] KVM RISC-V Support Anup Patel
2019-10-16 16:08 ` [PATCH v9 01/22] RISC-V: Add bitmap reprensenting ISA features common across CPUs Anup Patel
2019-10-17 8:48 ` Anup Patel
2019-10-25 23:30 ` Paul Walmsley [this message]
2019-10-16 16:08 ` [PATCH v9 02/22] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2019-10-16 16:08 ` [PATCH v9 03/22] RISC-V: Add initial skeletal KVM support Anup Patel
2019-11-20 8:04 ` Paul Walmsley
2019-10-16 16:08 ` [PATCH v9 04/22] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2019-10-16 16:09 ` [PATCH v9 05/22] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2019-10-16 16:09 ` [PATCH v9 06/22] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2019-10-16 16:09 ` [PATCH v9 07/22] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2019-10-16 16:09 ` [PATCH v9 08/22] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2019-10-16 16:10 ` [PATCH v9 09/22] RISC-V: KVM: Handle WFI " Anup Patel
2019-10-16 16:10 ` [PATCH v9 10/22] RISC-V: KVM: Implement VMID allocator Anup Patel
2019-10-16 16:10 ` [PATCH v9 11/22] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2019-10-16 16:10 ` [PATCH v9 12/22] RISC-V: KVM: Implement MMU notifiers Anup Patel
2019-10-16 16:10 ` [PATCH v9 13/22] RISC-V: KVM: Add timer functionality Anup Patel
2019-12-04 16:08 ` Daniel Lezcano
2019-10-16 16:10 ` [PATCH v9 14/22] RISC-V: KVM: FP lazy save/restore Anup Patel
2019-10-16 16:11 ` [PATCH v9 15/22] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2019-10-16 16:11 ` [PATCH v9 16/22] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2019-10-16 16:11 ` [PATCH v9 17/22] RISC-V: KVM: Forward unhandled SBI calls to userspace Anup Patel
2019-10-16 16:11 ` [PATCH v9 18/22] RISC-V: KVM: Simplify stage2 page table programming Anup Patel
2019-10-21 17:31 ` Paolo Bonzini
2019-10-22 5:12 ` Anup Patel
2019-10-16 16:12 ` [PATCH v9 19/22] RISC-V: KVM: Remove per-CPU vsip_shadow variable Anup Patel
2019-10-21 17:28 ` Paolo Bonzini
2019-10-22 5:09 ` Anup Patel
2019-10-16 16:12 ` [PATCH v9 20/22] RISC-V: KVM: Fix race-condition in kvm_riscv_vcpu_sync_interrupts() Anup Patel
2019-10-21 17:27 ` Paolo Bonzini
2019-10-22 5:07 ` Anup Patel
2019-10-16 16:12 ` [PATCH v9 21/22] RISC-V: KVM: Document RISC-V specific parts of KVM API Anup Patel
2019-10-16 16:12 ` [PATCH v9 22/22] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
2019-10-25 23:10 ` [PATCH v9 00/22] KVM RISC-V Support Paul Walmsley
2019-10-26 3:22 ` Anup Patel
2019-10-26 5:33 ` Christoph Hellwig
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=alpine.DEB.2.21.9999.1910251629540.12828@viisi.sifive.com \
--to=paul.walmsley@sifive.com \
--cc=Alistair.Francis@wdc.com \
--cc=Anup.Patel@wdc.com \
--cc=Atish.Patra@wdc.com \
--cc=Damien.LeMoal@wdc.com \
--cc=anup@brainfault.org \
--cc=daniel.lezcano@linaro.org \
--cc=graf@amazon.com \
--cc=hch@infradead.org \
--cc=kvm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@sifive.com \
--cc=pbonzini@redhat.com \
--cc=rkrcmar@redhat.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).