From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-14.0 required=3.0 tests=BAYES_00,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15E07C433E6 for ; Mon, 15 Mar 2021 09:21:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id BC7A964E33 for ; Mon, 15 Mar 2021 09:21:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229614AbhCOJVC (ORCPT ); Mon, 15 Mar 2021 05:21:02 -0400 Received: from mail.kernel.org ([198.145.29.99]:47744 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229591AbhCOJVB (ORCPT ); Mon, 15 Mar 2021 05:21:01 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id ADB7264E12; Mon, 15 Mar 2021 09:21:00 +0000 (UTC) Received: from disco-boy.misterjones.org ([51.254.78.96] helo=www.loen.fr) by disco-boy.misterjones.org with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94) (envelope-from ) id 1lLjPG-001cIb-KN; Mon, 15 Mar 2021 09:20:58 +0000 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Date: Mon, 15 Mar 2021 09:20:58 +0000 From: Marc Zyngier To: Shenming Lu Cc: Eric Auger , Will Deacon , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Alex Williamson , Cornelia Huck , Lorenzo Pieralisi , wanghaibin.wang@huawei.com, yuzenghui@huawei.com Subject: Re: [PATCH v4 5/6] KVM: arm64: GICv4.1: Restore VLPI pending state to physical side In-Reply-To: <81fbadda-0489-ffc3-cb38-08e89871ec95@huawei.com> References: <20210313083900.234-1-lushenming@huawei.com> <20210313083900.234-6-lushenming@huawei.com> <81fbadda-0489-ffc3-cb38-08e89871ec95@huawei.com> User-Agent: Roundcube Webmail/1.4.11 Message-ID: X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: lushenming@huawei.com, eric.auger@redhat.com, will@kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, alex.williamson@redhat.com, cohuck@redhat.com, lorenzo.pieralisi@arm.com, wanghaibin.wang@huawei.com, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 2021-03-15 09:11, Shenming Lu wrote: > On 2021/3/15 16:30, Marc Zyngier wrote: >> On 2021-03-13 08:38, Shenming Lu wrote: >>> From: Zenghui Yu >>> >>> When setting the forwarding path of a VLPI (switch to the HW mode), >>> we can also transfer the pending state from irq->pending_latch to >>> VPT (especially in migration, the pending states of VLPIs are >>> restored >>> into kvm’s vgic first). And we currently send "INT+VSYNC" to trigger >>> a VLPI to pending. >>> >>> Signed-off-by: Zenghui Yu >>> Signed-off-by: Shenming Lu >>> --- >>>  arch/arm64/kvm/vgic/vgic-v4.c | 18 ++++++++++++++++++ >>>  1 file changed, 18 insertions(+) >>> >>> diff --git a/arch/arm64/kvm/vgic/vgic-v4.c >>> b/arch/arm64/kvm/vgic/vgic-v4.c >>> index ac029ba3d337..3b82ab80c2f3 100644 >>> --- a/arch/arm64/kvm/vgic/vgic-v4.c >>> +++ b/arch/arm64/kvm/vgic/vgic-v4.c >>> @@ -449,6 +449,24 @@ int kvm_vgic_v4_set_forwarding(struct kvm *kvm, >>> int virq, >>>      irq->host_irq    = virq; >>>      atomic_inc(&map.vpe->vlpi_count); >>> >>> +    /* Transfer pending state */ >>> +    if (irq->pending_latch) { >>> +        unsigned long flags; >>> + >>> +        ret = irq_set_irqchip_state(irq->host_irq, >>> +                        IRQCHIP_STATE_PENDING, >>> +                        irq->pending_latch); >>> +        WARN_RATELIMIT(ret, "IRQ %d", irq->host_irq); >>> + >>> +        /* >>> +         * Clear pending_latch and communicate this state >>> +         * change via vgic_queue_irq_unlock. >>> +         */ >>> +        raw_spin_lock_irqsave(&irq->irq_lock, flags); >>> +        irq->pending_latch = false; >>> +        vgic_queue_irq_unlock(kvm, irq, flags); >>> +    } >>> + >>>  out: >>>      mutex_unlock(&its->its_lock); >>>      return ret; >> >> The read side of the pending state isn't locked, but the write side >> is. >> I'd rather you lock the whole sequence for peace of mind. > > Did you mean to lock before emitting the mapping request, Or just > before reading > the pending state? Just before reading the pending state, so that we can't get a concurrent modification of that state while we make the interrupt pending in the VPT and clearing it in the emulation. Thanks, M. -- Jazz is not dead. It just smells funny...