From: James Morse <james.morse@arm.com>
To: Marc Zyngier <maz@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
Julien Thierry <julien.thierry.kdev@gmail.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Andrew Scull <ascull@google.com>, Will Deacon <will@kernel.org>,
Quentin Perret <qperret@google.com>,
David Brazdil <dbrazdil@google.com>,
kernel-team@android.com
Subject: Re: [PATCH 08/11] KVM: arm64: Inject AArch32 exceptions from HYP
Date: Tue, 27 Oct 2020 17:41:27 +0000 [thread overview]
Message-ID: <b4ef5e3e-a1a4-948f-bc9d-4bd297cb26a6@arm.com> (raw)
In-Reply-To: <20201026133450.73304-9-maz@kernel.org>
Hi Marc,
On 26/10/2020 13:34, Marc Zyngier wrote:
> Similarily to what has been done for AArch64, move the AArch32 exception
> inhjection to HYP.
>
> In order to not use the regmap selection code at EL2, simplify the code
> populating the target mode's LR register by harcoding the two possible
> LR registers (LR_abt in X20, LR_und in X22).
> diff --git a/arch/arm64/kvm/hyp/exception.c b/arch/arm64/kvm/hyp/exception.c
> index cd6e643639e8..8d1d1bcd9e69 100644
> --- a/arch/arm64/kvm/hyp/exception.c
> +++ b/arch/arm64/kvm/hyp/exception.c
> @@ -57,10 +67,25 @@ static void __vcpu_write_spsr(struct kvm_vcpu *vcpu, u64 val)
> +static inline u32 __vcpu_read_cp15(const struct kvm_vcpu *vcpu, int reg)
> +{
> + return __vcpu_read_sys_reg(vcpu, reg / 2);
> +}
Doesn't this re-implement the issue 3204be4109ad biased?
> @@ -155,23 +180,189 @@ static void enter_exception64(struct kvm_vcpu *vcpu, unsigned long target_mode,
> +static void enter_exception32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
> +{
> + /*
> + * Table D1-27 of DDI 0487F.c shows the GPR mapping between
> + * AArch32 and AArch64. We only deal with ABT/UND.
(to check I understand : because these are the only two KVM ever injects?)
> + */
> + switch(mode) {
> + case PSR_AA32_MODE_ABT:
> + __vcpu_write_spsr_abt(vcpu, host_spsr_to_spsr32(spsr));
> + lr = 20;
> break;
> +
(two bonus tabs!)
> + case PSR_AA32_MODE_UND:
> + __vcpu_write_spsr_und(vcpu, host_spsr_to_spsr32(spsr));
> + lr = 22;
> break;
> }> +
> + vcpu_set_reg(vcpu, lr, *vcpu_pc(vcpu) + return_offset);
Can we, abuse, the compat_lr_abt definitions to do something like:
| u32 return_address = *vcpu_pc(vcpu) + return_offset;
[..]
| switch(mode) {
| case PSR_AA32_MODE_ABT:>
| __vcpu_write_spsr_abt(vcpu, host_spsr_to_spsr32(spsr));
| vcpu_gp_regs(vcpu)->compat_lr_abt = return_address;
| break;
| case PSR_AA32_MODE_UND:
| __vcpu_write_spsr_und(vcpu, host_spsr_to_spsr32(spsr));
| vcpu_gp_regs(vcpu)->compat_lr_und = return_address;
| break;
...as someone who has no clue about 32bit, this hides all the worrying magic-14==magic-22!
Thanks,
James
> +}
next prev parent reply other threads:[~2020-10-27 17:41 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-26 13:34 [PATCH 00/11] KVM: arm64: Move PC/ELR/SPSR/PSTATE updatess to EL2 Marc Zyngier
2020-10-26 13:34 ` [PATCH 01/11] KVM: arm64: Don't adjust PC on SError during SMC trap Marc Zyngier
2020-10-26 13:53 ` Mark Rutland
2020-10-26 14:08 ` Marc Zyngier
2020-10-26 14:22 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 02/11] KVM: arm64: Move kvm_vcpu_trap_il_is32bit into kvm_skip_instr32() Marc Zyngier
2020-10-26 13:55 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 03/11] KVM: arm64: Make kvm_skip_instr() and co private to HYP Marc Zyngier
2020-10-26 14:04 ` Mark Rutland
2020-10-27 16:17 ` Marc Zyngier
2020-10-27 10:55 ` Suzuki K Poulose
2020-10-27 11:08 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 04/11] KVM: arm64: Move PC rollback on SError " Marc Zyngier
2020-10-26 14:06 ` Mark Rutland
2020-10-27 14:56 ` James Morse
2020-10-27 14:59 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 05/11] KVM: arm64: Move VHE direct sysreg accessors into kvm_host.h Marc Zyngier
2020-10-26 14:07 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 06/11] KVM: arm64: Add basic hooks for injecting exceptions from EL2 Marc Zyngier
2020-10-26 13:34 ` [PATCH 07/11] KVM: arm64: Inject AArch64 exceptions from HYP Marc Zyngier
2020-10-26 14:22 ` Mark Rutland
2020-10-27 16:21 ` Marc Zyngier
2020-10-27 17:41 ` James Morse
2020-10-27 18:49 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 08/11] KVM: arm64: Inject AArch32 " Marc Zyngier
2020-10-26 14:26 ` Mark Rutland
2020-10-27 17:41 ` James Morse [this message]
2020-10-27 19:21 ` Marc Zyngier
2020-10-28 19:20 ` James Morse
2020-10-28 20:24 ` Marc Zyngier
2020-10-26 13:34 ` [PATCH 09/11] KVM: arm64: Remove SPSR manipulation primitives Marc Zyngier
2020-10-26 14:30 ` Mark Rutland
2020-10-26 13:34 ` [PATCH 10/11] KVM: arm64: Consolidate exception injection Marc Zyngier
2020-10-26 13:34 ` [PATCH 11/11] KVM: arm64: Get rid of the AArch32 register mapping code Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=b4ef5e3e-a1a4-948f-bc9d-4bd297cb26a6@arm.com \
--to=james.morse@arm.com \
--cc=ascull@google.com \
--cc=dbrazdil@google.com \
--cc=julien.thierry.kdev@gmail.com \
--cc=kernel-team@android.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=maz@kernel.org \
--cc=qperret@google.com \
--cc=suzuki.poulose@arm.com \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).