[Bug 208767] kernel stack overflow due to Lazy update IOAPIC on an x86_64 *host*, when gpu is passthrough to macos guest vm

[bugzilla-daemon@bugzilla.kernel.org]

https://bugzilla.kernel.org/show_bug.cgi?id=208767

--- Comment #6 from Yani Stoyanov (yaweb@mail.bg) ---
I am not sure if this is relevant but there was old bug which explains how osx
configure IOAPIC with the wrong polarity bit values. I may be interesting to
take a look (I know it is from 6 years ago).

https://www.contrib.andrew.cmu.edu/~somlo/OSXKVM/index_old.html

the part: 

ACPI-compliant operating systems are expected to query the firmware for an
indication of which polarity type (ActiveLow or ActiveHigh) to use for any
devices with level-triggered interrupts, and to configure the IOAPIC registers
accordingly. Both QEMU and KVM have accumulated a significant number of
optimizations based on the assumption that guest operating systems use
ActiveHigh polarity, and are coded to assume that "physical" and "logical" IRQ
line states are in sync. Even when a misbehaving guest OS (you guessed it, OS X
does this) ignores the ACPI polarity hint (which in QEMU/KVM is ActiveLow, i.e.
"physical"=="logical") and configures the virtual IOAPIC with the wrong
polarity bit values, both QEMU and KVM will mostly use "logical" IRQ line
levels.

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