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[88.21.201.14]) by smtp.gmail.com with ESMTPSA id a192sm20094780wma.1.2019.10.15.09.29.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 15 Oct 2019 09:29:38 -0700 (PDT) Subject: Re: [PATCH 01/32] hw/i386: Remove obsolete LoadStateHandler::load_state_old handlers To: qemu-devel@nongnu.org, "Daniel P . Berrange" , "Dr. David Alan Gilbert" , Juan Quintela Cc: Aleksandar Markovic , Aurelien Jarno , Eduardo Habkost , Thomas Huth , Igor Mammedov , Anthony Perard , Stefano Stabellini , Paul Durrant , =?UTF-8?Q?Herv=c3=a9_Poussineau?= , Aleksandar Rikalo , xen-devel@lists.xenproject.org, Laurent Vivier , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , kvm@vger.kernel.org, Peter Maydell References: <20191015162705.28087-1-philmd@redhat.com> <20191015162705.28087-2-philmd@redhat.com> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Tue, 15 Oct 2019 18:29:36 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.0 MIME-Version: 1.0 In-Reply-To: <20191015162705.28087-2-philmd@redhat.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org I forgot to Cc David and Daniel for this one. On 10/15/19 6:26 PM, Philippe Mathieu-Daudé wrote: > These devices implemented their load_state_old() handler 10 years > ago, previous to QEMU v0.12. > Since commit cc425b5ddf removed the pc-0.10 and pc-0.11 machines, > we can drop this code. > > Note: the mips_r4k machine started to use the i8254 device just > after QEMU v0.5.0, but the MIPS machine types are not versioned, > so there is no migration compatibility issue removing this handler. > > Suggested-by: Peter Maydell > Signed-off-by: Philippe Mathieu-Daudé > --- > hw/acpi/piix4.c | 40 --------------------------------- > hw/intc/apic_common.c | 49 ----------------------------------------- > hw/pci-host/piix.c | 25 --------------------- > hw/timer/i8254_common.c | 40 --------------------------------- > 4 files changed, 154 deletions(-) > > diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c > index 5742c3df87..1d29d438c7 100644 > --- a/hw/acpi/piix4.c > +++ b/hw/acpi/piix4.c > @@ -42,7 +42,6 @@ > #include "hw/acpi/memory_hotplug.h" > #include "hw/acpi/acpi_dev_interface.h" > #include "hw/xen/xen.h" > -#include "migration/qemu-file-types.h" > #include "migration/vmstate.h" > #include "hw/core/cpu.h" > #include "trace.h" > @@ -205,43 +204,6 @@ static const VMStateDescription vmstate_pci_status = { > } > }; > > -static int acpi_load_old(QEMUFile *f, void *opaque, int version_id) > -{ > - PIIX4PMState *s = opaque; > - int ret, i; > - uint16_t temp; > - > - ret = pci_device_load(PCI_DEVICE(s), f); > - if (ret < 0) { > - return ret; > - } > - qemu_get_be16s(f, &s->ar.pm1.evt.sts); > - qemu_get_be16s(f, &s->ar.pm1.evt.en); > - qemu_get_be16s(f, &s->ar.pm1.cnt.cnt); > - > - ret = vmstate_load_state(f, &vmstate_apm, &s->apm, 1); > - if (ret) { > - return ret; > - } > - > - timer_get(f, s->ar.tmr.timer); > - qemu_get_sbe64s(f, &s->ar.tmr.overflow_time); > - > - qemu_get_be16s(f, (uint16_t *)s->ar.gpe.sts); > - for (i = 0; i < 3; i++) { > - qemu_get_be16s(f, &temp); > - } > - > - qemu_get_be16s(f, (uint16_t *)s->ar.gpe.en); > - for (i = 0; i < 3; i++) { > - qemu_get_be16s(f, &temp); > - } > - > - ret = vmstate_load_state(f, &vmstate_pci_status, > - &s->acpi_pci_hotplug.acpi_pcihp_pci_status[ACPI_PCIHP_BSEL_DEFAULT], 1); > - return ret; > -} > - > static bool vmstate_test_use_acpi_pci_hotplug(void *opaque, int version_id) > { > PIIX4PMState *s = opaque; > @@ -313,8 +275,6 @@ static const VMStateDescription vmstate_acpi = { > .name = "piix4_pm", > .version_id = 3, > .minimum_version_id = 3, > - .minimum_version_id_old = 1, > - .load_state_old = acpi_load_old, > .post_load = vmstate_acpi_post_load, > .fields = (VMStateField[]) { > VMSTATE_PCI_DEVICE(parent_obj, PIIX4PMState), > diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c > index aafd8e0e33..375cb6abe9 100644 > --- a/hw/intc/apic_common.c > +++ b/hw/intc/apic_common.c > @@ -31,7 +31,6 @@ > #include "sysemu/kvm.h" > #include "hw/qdev-properties.h" > #include "hw/sysbus.h" > -#include "migration/qemu-file-types.h" > #include "migration/vmstate.h" > > static int apic_irq_delivered; > @@ -262,52 +261,6 @@ static void apic_reset_common(DeviceState *dev) > apic_init_reset(dev); > } > > -/* This function is only used for old state version 1 and 2 */ > -static int apic_load_old(QEMUFile *f, void *opaque, int version_id) > -{ > - APICCommonState *s = opaque; > - APICCommonClass *info = APIC_COMMON_GET_CLASS(s); > - int i; > - > - if (version_id > 2) { > - return -EINVAL; > - } > - > - /* XXX: what if the base changes? (registered memory regions) */ > - qemu_get_be32s(f, &s->apicbase); > - qemu_get_8s(f, &s->id); > - qemu_get_8s(f, &s->arb_id); > - qemu_get_8s(f, &s->tpr); > - qemu_get_be32s(f, &s->spurious_vec); > - qemu_get_8s(f, &s->log_dest); > - qemu_get_8s(f, &s->dest_mode); > - for (i = 0; i < 8; i++) { > - qemu_get_be32s(f, &s->isr[i]); > - qemu_get_be32s(f, &s->tmr[i]); > - qemu_get_be32s(f, &s->irr[i]); > - } > - for (i = 0; i < APIC_LVT_NB; i++) { > - qemu_get_be32s(f, &s->lvt[i]); > - } > - qemu_get_be32s(f, &s->esr); > - qemu_get_be32s(f, &s->icr[0]); > - qemu_get_be32s(f, &s->icr[1]); > - qemu_get_be32s(f, &s->divide_conf); > - s->count_shift = qemu_get_be32(f); > - qemu_get_be32s(f, &s->initial_count); > - s->initial_count_load_time = qemu_get_be64(f); > - s->next_time = qemu_get_be64(f); > - > - if (version_id >= 2) { > - s->timer_expiry = qemu_get_be64(f); > - } > - > - if (info->post_load) { > - info->post_load(s); > - } > - return 0; > -} > - > static const VMStateDescription vmstate_apic_common; > > static void apic_common_realize(DeviceState *dev, Error **errp) > @@ -408,8 +361,6 @@ static const VMStateDescription vmstate_apic_common = { > .name = "apic", > .version_id = 3, > .minimum_version_id = 3, > - .minimum_version_id_old = 1, > - .load_state_old = apic_load_old, > .pre_load = apic_pre_load, > .pre_save = apic_dispatch_pre_save, > .post_load = apic_dispatch_post_load, > diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c > index 135c645535..2f4cbcbfe9 100644 > --- a/hw/pci-host/piix.c > +++ b/hw/pci-host/piix.c > @@ -33,7 +33,6 @@ > #include "qapi/error.h" > #include "qemu/range.h" > #include "hw/xen/xen.h" > -#include "migration/qemu-file-types.h" > #include "migration/vmstate.h" > #include "hw/pci-host/pam.h" > #include "sysemu/reset.h" > @@ -174,28 +173,6 @@ static void i440fx_write_config(PCIDevice *dev, > } > } > > -static int i440fx_load_old(QEMUFile* f, void *opaque, int version_id) > -{ > - PCII440FXState *d = opaque; > - PCIDevice *pd = PCI_DEVICE(d); > - int ret, i; > - uint8_t smm_enabled; > - > - ret = pci_device_load(pd, f); > - if (ret < 0) > - return ret; > - i440fx_update_memory_mappings(d); > - qemu_get_8s(f, &smm_enabled); > - > - if (version_id == 2) { > - for (i = 0; i < PIIX_NUM_PIRQS; i++) { > - qemu_get_be32(f); /* dummy load for compatibility */ > - } > - } > - > - return 0; > -} > - > static int i440fx_post_load(void *opaque, int version_id) > { > PCII440FXState *d = opaque; > @@ -208,8 +185,6 @@ static const VMStateDescription vmstate_i440fx = { > .name = "I440FX", > .version_id = 3, > .minimum_version_id = 3, > - .minimum_version_id_old = 1, > - .load_state_old = i440fx_load_old, > .post_load = i440fx_post_load, > .fields = (VMStateField[]) { > VMSTATE_PCI_DEVICE(parent_obj, PCII440FXState), > diff --git a/hw/timer/i8254_common.c b/hw/timer/i8254_common.c > index 57bf10cc94..050875b497 100644 > --- a/hw/timer/i8254_common.c > +++ b/hw/timer/i8254_common.c > @@ -29,7 +29,6 @@ > #include "qemu/timer.h" > #include "hw/timer/i8254.h" > #include "hw/timer/i8254_internal.h" > -#include "migration/qemu-file-types.h" > #include "migration/vmstate.h" > > /* val must be 0 or 1 */ > @@ -202,43 +201,6 @@ static const VMStateDescription vmstate_pit_channel = { > } > }; > > -static int pit_load_old(QEMUFile *f, void *opaque, int version_id) > -{ > - PITCommonState *pit = opaque; > - PITCommonClass *c = PIT_COMMON_GET_CLASS(pit); > - PITChannelState *s; > - int i; > - > - if (version_id != 1) { > - return -EINVAL; > - } > - > - for (i = 0; i < 3; i++) { > - s = &pit->channels[i]; > - s->count = qemu_get_be32(f); > - qemu_get_be16s(f, &s->latched_count); > - qemu_get_8s(f, &s->count_latched); > - qemu_get_8s(f, &s->status_latched); > - qemu_get_8s(f, &s->status); > - qemu_get_8s(f, &s->read_state); > - qemu_get_8s(f, &s->write_state); > - qemu_get_8s(f, &s->write_latch); > - qemu_get_8s(f, &s->rw_mode); > - qemu_get_8s(f, &s->mode); > - qemu_get_8s(f, &s->bcd); > - qemu_get_8s(f, &s->gate); > - s->count_load_time = qemu_get_be64(f); > - s->irq_disabled = 0; > - if (i == 0) { > - s->next_transition_time = qemu_get_be64(f); > - } > - } > - if (c->post_load) { > - c->post_load(pit); > - } > - return 0; > -} > - > static int pit_dispatch_pre_save(void *opaque) > { > PITCommonState *s = opaque; > @@ -266,8 +228,6 @@ static const VMStateDescription vmstate_pit_common = { > .name = "i8254", > .version_id = 3, > .minimum_version_id = 2, > - .minimum_version_id_old = 1, > - .load_state_old = pit_load_old, > .pre_save = pit_dispatch_pre_save, > .post_load = pit_dispatch_post_load, > .fields = (VMStateField[]) { >