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([2a01:e0a:59e:9d80:527b:9dff:feef:3874]) by smtp.gmail.com with ESMTPSA id h2sm3566055wrz.23.2021.11.25.12.30.50 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 25 Nov 2021 12:30:50 -0800 (PST) Subject: Re: [RFC PATCH v3 09/29] KVM: arm64: Hide IMPLEMENTATION DEFINED PMU support for the guest To: Reiji Watanabe , Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, Will Deacon , Peter Shier , Paolo Bonzini , linux-arm-kernel@lists.infradead.org References: <20211117064359.2362060-1-reijiw@google.com> <20211117064359.2362060-10-reijiw@google.com> From: Eric Auger Message-ID: Date: Thu, 25 Nov 2021 21:30:49 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.1 MIME-Version: 1.0 In-Reply-To: <20211117064359.2362060-10-reijiw@google.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Hi Reiji, On 11/17/21 7:43 AM, Reiji Watanabe wrote: > When ID_AA64DFR0_EL1.PMUVER or ID_DFR0_EL1.PERFMON is 0xf, which > means IMPLEMENTATION DEFINED PMU supported, KVM unconditionally > expose the value for the guest as it is. Since KVM doesn't support > IMPLEMENTATION DEFINED PMU for the guest, in that case KVM should > exopse 0x0 (PMU is not implemented) instead. s/exopse/expose > > Change cpuid_feature_cap_perfmon_field() to update the field value > to 0x0 when it is 0xf. is it wrong to expose the guest with a Perfmon value of 0xF? Then the guest should not use it as a PMUv3? Eric > > Fixes: 8e35aa642ee4 ("arm64: cpufeature: Extract capped perfmon fields") > Signed-off-by: Reiji Watanabe > --- > arch/arm64/include/asm/cpufeature.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h > index ef6be92b1921..fd7ad8193827 100644 > --- a/arch/arm64/include/asm/cpufeature.h > +++ b/arch/arm64/include/asm/cpufeature.h > @@ -553,7 +553,7 @@ cpuid_feature_cap_perfmon_field(u64 features, int field, u64 cap) > > /* Treat IMPLEMENTATION DEFINED functionality as unimplemented */ > if (val == ID_AA64DFR0_PMUVER_IMP_DEF) > - val = 0; > + return (features & ~mask); > > if (val > cap) { > features &= ~mask; >