From: Dave Hansen <dave.hansen@intel.com>
To: Sean Christopherson <seanjc@google.com>,
Jing Liu <jing2.liu@linux.intel.com>
Cc: pbonzini@redhat.com, kvm@vger.kernel.org,
linux-kernel@vger.kernel.org, jing2.liu@intel.com
Subject: Re: [PATCH RFC 2/7] kvm: x86: Introduce XFD MSRs as passthrough to guest
Date: Wed, 23 Jun 2021 10:50:56 -0700 [thread overview]
Message-ID: <d6e7328d-335f-b244-48d7-4ffe8b04fb05@intel.com> (raw)
In-Reply-To: <YKwd5OTXr97Fxfok@google.com>
On 5/24/21 2:43 PM, Sean Christopherson wrote:
> On Sun, Feb 07, 2021, Jing Liu wrote:
>> Passthrough both MSRs to let guest access and write without vmexit.
> Why? Except for read-only MSRs, e.g. MSR_CORE_C1_RES, passthrough MSRs are
> costly to support because KVM must context switch the MSR (which, by the by, is
> completely missing from the patch).
>
> In other words, if these MSRs are full RW passthrough, guests with XFD enabled
> will need to load the guest value on entry, save the guest value on exit, and
> load the host value on exit. That's in the neighborhood of a 40% increase in
> latency for a single VM-Enter/VM-Exit roundtrip (~1500 cycles => >2000 cycles).
I'm not taking a position as to whether these _should_ be passthrough or
not. But, if they are, I don't think you strictly need to do the
RDMSR/WRMSR at VM-Exit time.
Just like the "FPU", XFD isn't be used in normal kernel code. This is
why we can be lazy about FPU state with TIF_NEED_FPU_LOAD. I _suspect_
that some XFD manipulation can be at least deferred to the same place
where the FPU state is manipulated: places like switch_fpu_return() or
kernel_fpu_begin().
Doing that would at least help the fast VM-Exit/VM-Enter paths that
really like TIF_NEED_FPU_LOAD today.
I guess the nasty part is that you actually need to stash the old XFD
MSR value in the vcpu structure and that's not available at
context-switch time. So, maybe this would only allow deferring the
WRMSR. That's better than nothing I guess.
next prev parent reply other threads:[~2021-06-23 17:51 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-07 15:42 [PATCH RFC 0/7] Introduce support for guest AMX feature Jing Liu
2021-02-07 15:42 ` [PATCH RFC 1/7] kvm: x86: Expose XFD CPUID to guest Jing Liu
2021-05-24 21:34 ` Sean Christopherson
2021-06-07 3:27 ` Liu, Jing2
2021-02-07 15:42 ` [PATCH RFC 2/7] kvm: x86: Introduce XFD MSRs as passthrough " Jing Liu
2021-05-24 21:43 ` Sean Christopherson
2021-05-24 21:57 ` Jim Mattson
2021-06-02 3:12 ` Liu, Jing2
2021-06-23 17:50 ` Dave Hansen [this message]
2021-06-28 2:00 ` Liu, Jing2
2021-06-29 17:58 ` Dave Hansen
2021-07-06 7:33 ` Liu, Jing2
2021-02-07 15:42 ` [PATCH RFC 3/7] kvm: x86: XSAVE state and XFD MSRs context switch Jing Liu
2021-02-07 11:49 ` Borislav Petkov
2021-02-08 3:35 ` Liu, Jing2
2021-02-08 10:25 ` Paolo Bonzini
2021-02-08 17:31 ` Sean Christopherson
2021-02-08 17:45 ` Paolo Bonzini
2021-02-08 18:04 ` Sean Christopherson
2021-02-08 18:12 ` Paolo Bonzini
2021-02-08 18:55 ` Konrad Rzeszutek Wilk
2021-02-22 8:51 ` Liu, Jing2
2021-02-22 8:36 ` Liu, Jing2
2021-02-07 15:42 ` [PATCH RFC 4/7] kvm: x86: Add new ioctls for XSAVE extension Jing Liu
2021-05-24 21:50 ` Sean Christopherson
2021-05-26 6:09 ` Liu, Jing2
2021-05-26 14:43 ` Sean Christopherson
2021-06-01 10:24 ` Liu, Jing2
2021-06-07 5:23 ` Liu, Jing2
2021-05-24 22:06 ` Jim Mattson
2021-05-26 6:11 ` Liu, Jing2
2021-02-07 15:42 ` [PATCH RFC 5/7] kvm: x86: Revise CPUID.D.1.EBX for alignment rule Jing Liu
2021-05-24 21:28 ` Sean Christopherson
2021-06-03 4:45 ` Liu, Jing2
2021-02-07 15:42 ` [PATCH RFC 6/7] kvm: x86: Add AMX_TILE, AMX_INT8 and AMX_BF16 support Jing Liu
2021-02-07 15:42 ` [PATCH RFC 7/7] kvm: x86: AMX XCR0 support for guest Jing Liu
2021-05-24 21:53 ` Sean Christopherson
2021-05-26 7:54 ` Liu, Jing2
2021-05-26 14:54 ` Sean Christopherson
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