[PATCH 0/2] Enumerate and expose AVX_VNNI feature

[PATCH 0/2] Enumerate and expose AVX_VNNI feature

[Yang Zhong]

A processor supports AVX_VNNI instructions if CPUID.(EAX=7,ECX=1):EAX[bit 4]
is present.

This series includes kernel and kvm patches, kernel patch define this
new cpu feature bit and kvm expose this bit to guest. When this bit is
enabled on cpu or vcpu, the cpu feature flag is shown as "avx_vnni" in
/proc/cpuinfo of host and guest.

Detailed information on the instruction and CPUID feature flag can be
found in the latest "extensions" manual [1].

Reference:
[1]. https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html


Kyung Min Park (1):
  Enumerate AVX Vector Neural Network instructions

Yang Zhong (1):
  KVM: Expose AVX_VNNI instruction to guset

 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/kvm/cpuid.c               | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

-- 
2.29.2.334.gfaefdd61ec

[PATCH 1/2] Enumerate AVX Vector Neural Network instructions

[Yang Zhong]

From: Kyung Min Park <kyung.min.park@intel.com>

Add AVX version of the Vector Neural Network (VNNI) Instructions.

A processor supports AVX VNNI instructions if CPUID.0x07.0x1:EAX[4] is
present. The following instructions are available when this feature is
present.
  1. VPDPBUS: Multiply and Add Unsigned and Signed Bytes
  2. VPDPBUSDS: Multiply and Add Unsigned and Signed Bytes with Saturation
  3. VPDPWSSD: Multiply and Add Signed Word Integers
  4. VPDPWSSDS: Multiply and Add Signed Integers with Saturation

The only in-kernel usage of this is kvm passthrough. The CPU feature
flag is shown as "avx_vnni" in /proc/cpuinfo.

This instruction is currently documented in the latest "extensions"
manual (ISE). It will appear in the "main" manual (SDM) in the future.

Signed-off-by: Kyung Min Park <kyung.min.park@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index f5ef2d5b9231..d10d9962bd9b 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -293,6 +293,7 @@
 #define X86_FEATURE_PER_THREAD_MBA	(11*32+ 7) /* "" Per-thread Memory Bandwidth Allocation */
 
 /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
+#define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
 #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
 
 /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
-- 
2.29.2.334.gfaefdd61ec

[PATCH 2/2] KVM: Expose AVX_VNNI instruction to guset

[Yang Zhong]

Expose AVX (VEX-encoded) versions of the Vector Neural Network
Instructions to guest.

The bit definition:
CPUID.(EAX=7,ECX=1):EAX[bit 4] AVX_VNNI

The following instructions are available when this feature is
present in the guest.
  1. VPDPBUS: Multiply and Add Unsigned and Signed Bytes
  2. VPDPBUSDS: Multiply and Add Unsigned and Signed Bytes with Saturation
  3. VPDPWSSD: Multiply and Add Signed Word Integers
  4. VPDPWSSDS: Multiply and Add Signed Integers with Saturation

This instruction is currently documented in the latest "extensions"
manual (ISE). It will appear in the "main" manual (SDM) in the future.

Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
---
 arch/x86/kvm/cpuid.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 83637a2ff605..4229b67f0a8d 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -433,7 +433,7 @@ void kvm_set_cpu_caps(void)
 		kvm_cpu_cap_set(X86_FEATURE_SPEC_CTRL_SSBD);
 
 	kvm_cpu_cap_mask(CPUID_7_1_EAX,
-		F(AVX512_BF16)
+		F(AVX_VNNI) | F(AVX512_BF16)
 	);
 
 	kvm_cpu_cap_mask(CPUID_D_1_EAX,
-- 
2.29.2.334.gfaefdd61ec

Re: [PATCH 1/2] Enumerate AVX Vector Neural Network instructions

[Paolo Bonzini]

On 05/01/21 01:49, Yang Zhong wrote:
> From: Kyung Min Park <kyung.min.park@intel.com>
> 
> Add AVX version of the Vector Neural Network (VNNI) Instructions.
> 
> A processor supports AVX VNNI instructions if CPUID.0x07.0x1:EAX[4] is
> present. The following instructions are available when this feature is
> present.
>    1. VPDPBUS: Multiply and Add Unsigned and Signed Bytes
>    2. VPDPBUSDS: Multiply and Add Unsigned and Signed Bytes with Saturation
>    3. VPDPWSSD: Multiply and Add Signed Word Integers
>    4. VPDPWSSDS: Multiply and Add Signed Integers with Saturation
> 
> The only in-kernel usage of this is kvm passthrough. The CPU feature
> flag is shown as "avx_vnni" in /proc/cpuinfo.
> 
> This instruction is currently documented in the latest "extensions"
> manual (ISE). It will appear in the "main" manual (SDM) in the future.
> 
> Signed-off-by: Kyung Min Park <kyung.min.park@intel.com>
> Signed-off-by: Yang Zhong <yang.zhong@intel.com>
> Reviewed-by: Tony Luck <tony.luck@intel.com>
> ---
>   arch/x86/include/asm/cpufeatures.h | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index f5ef2d5b9231..d10d9962bd9b 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -293,6 +293,7 @@
>   #define X86_FEATURE_PER_THREAD_MBA	(11*32+ 7) /* "" Per-thread Memory Bandwidth Allocation */
>   
>   /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
> +#define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
>   #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
>   
>   /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
> 

Boris, is it possible to have a topic branch for this patch?

Re: [PATCH 1/2] Enumerate AVX Vector Neural Network instructions

[Borislav Petkov]

On Tue, Jan 05, 2021 at 12:47:23PM +0100, Paolo Bonzini wrote:
> On 05/01/21 01:49, Yang Zhong wrote:
> > From: Kyung Min Park <kyung.min.park@intel.com>
> > 
> > Add AVX version of the Vector Neural Network (VNNI) Instructions.
> > 
> > A processor supports AVX VNNI instructions if CPUID.0x07.0x1:EAX[4] is
> > present. The following instructions are available when this feature is
> > present.
> >    1. VPDPBUS: Multiply and Add Unsigned and Signed Bytes
> >    2. VPDPBUSDS: Multiply and Add Unsigned and Signed Bytes with Saturation
> >    3. VPDPWSSD: Multiply and Add Signed Word Integers
> >    4. VPDPWSSDS: Multiply and Add Signed Integers with Saturation
> > 
> > The only in-kernel usage of this is kvm passthrough. The CPU feature
> > flag is shown as "avx_vnni" in /proc/cpuinfo.
> > 
> > This instruction is currently documented in the latest "extensions"
> > manual (ISE). It will appear in the "main" manual (SDM) in the future.
> > 
> > Signed-off-by: Kyung Min Park <kyung.min.park@intel.com>
> > Signed-off-by: Yang Zhong <yang.zhong@intel.com>
> > Reviewed-by: Tony Luck <tony.luck@intel.com>
> > ---
> >   arch/x86/include/asm/cpufeatures.h | 1 +
> >   1 file changed, 1 insertion(+)
> > 
> > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> > index f5ef2d5b9231..d10d9962bd9b 100644
> > --- a/arch/x86/include/asm/cpufeatures.h
> > +++ b/arch/x86/include/asm/cpufeatures.h
> > @@ -293,6 +293,7 @@
> >   #define X86_FEATURE_PER_THREAD_MBA	(11*32+ 7) /* "" Per-thread Memory Bandwidth Allocation */
> >   /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
> > +#define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
> >   #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
> >   /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
> > 
> 
> Boris, is it possible to have a topic branch for this patch?

Just take it through your tree pls.

Acked-by: Borislav Petkov <bp@suse.de>

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH 1/2] Enumerate AVX Vector Neural Network instructions

[Yang Zhong]

On Tue, Jan 05, 2021 at 01:14:56PM +0100, Borislav Petkov wrote:
> On Tue, Jan 05, 2021 at 12:47:23PM +0100, Paolo Bonzini wrote:
> > On 05/01/21 01:49, Yang Zhong wrote:
> > > From: Kyung Min Park <kyung.min.park@intel.com>
> > > 
> > > Add AVX version of the Vector Neural Network (VNNI) Instructions.
> > > 
> > > A processor supports AVX VNNI instructions if CPUID.0x07.0x1:EAX[4] is
> > > present. The following instructions are available when this feature is
> > > present.
> > >    1. VPDPBUS: Multiply and Add Unsigned and Signed Bytes
> > >    2. VPDPBUSDS: Multiply and Add Unsigned and Signed Bytes with Saturation
> > >    3. VPDPWSSD: Multiply and Add Signed Word Integers
> > >    4. VPDPWSSDS: Multiply and Add Signed Integers with Saturation
> > > 
> > > The only in-kernel usage of this is kvm passthrough. The CPU feature
> > > flag is shown as "avx_vnni" in /proc/cpuinfo.
> > > 
> > > This instruction is currently documented in the latest "extensions"
> > > manual (ISE). It will appear in the "main" manual (SDM) in the future.
> > > 
> > > Signed-off-by: Kyung Min Park <kyung.min.park@intel.com>
> > > Signed-off-by: Yang Zhong <yang.zhong@intel.com>
> > > Reviewed-by: Tony Luck <tony.luck@intel.com>
> > > ---
> > >   arch/x86/include/asm/cpufeatures.h | 1 +
> > >   1 file changed, 1 insertion(+)
> > > 
> > > diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> > > index f5ef2d5b9231..d10d9962bd9b 100644
> > > --- a/arch/x86/include/asm/cpufeatures.h
> > > +++ b/arch/x86/include/asm/cpufeatures.h
> > > @@ -293,6 +293,7 @@
> > >   #define X86_FEATURE_PER_THREAD_MBA	(11*32+ 7) /* "" Per-thread Memory Bandwidth Allocation */
> > >   /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */
> > > +#define X86_FEATURE_AVX_VNNI		(12*32+ 4) /* AVX VNNI instructions */
> > >   #define X86_FEATURE_AVX512_BF16		(12*32+ 5) /* AVX512 BFLOAT16 instructions */
> > >   /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
> > > 
> > 
> > Boris, is it possible to have a topic branch for this patch?
> 
> Just take it through your tree pls.
> 
> Acked-by: Borislav Petkov <bp@suse.de>
>
  
  Paolo, Boris has acked this kernel patch, and if i need send new patchset to add this 
  acked-by info ? or kvm tree will directly pull this patchset? thanks.

  Yang  

   
> Thx.
> 
> -- 
> Regards/Gruss,
>     Boris.
> 
> https://people.kernel.org/tglx/notes-about-netiquette

Re: [PATCH 1/2] Enumerate AVX Vector Neural Network instructions

[Paolo Bonzini]

>>> Boris, is it possible to have a topic branch for this patch?
>>
>> Just take it through your tree pls.
>>
>> Acked-by: Borislav Petkov <bp@suse.de>
>>
>    
>    Paolo, Boris has acked this kernel patch, and if i need send new patchset to add this
>    acked-by info ? or kvm tree will directly pull this patchset? thanks.

I'll take care of it shortly.

Paolo

Re: [PATCH 0/2] Enumerate and expose AVX_VNNI feature

[Paolo Bonzini]

On 05/01/21 01:49, Yang Zhong wrote:
> A processor supports AVX_VNNI instructions if CPUID.(EAX=7,ECX=1):EAX[bit 4]
> is present.
> 
> This series includes kernel and kvm patches, kernel patch define this
> new cpu feature bit and kvm expose this bit to guest. When this bit is
> enabled on cpu or vcpu, the cpu feature flag is shown as "avx_vnni" in
> /proc/cpuinfo of host and guest.
> 
> Detailed information on the instruction and CPUID feature flag can be
> found in the latest "extensions" manual [1].
> 
> Reference:
> [1]. https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
> 
> 
> Kyung Min Park (1):
>    Enumerate AVX Vector Neural Network instructions
> 
> Yang Zhong (1):
>    KVM: Expose AVX_VNNI instruction to guset
> 
>   arch/x86/include/asm/cpufeatures.h | 1 +
>   arch/x86/kvm/cpuid.c               | 2 +-
>   2 files changed, 2 insertions(+), 1 deletion(-)
> 

Queued, thanks.

Paolo

Re: [PATCH 0/2] Enumerate and expose AVX_VNNI feature

[Yang Zhong]

On Thu, Jan 21, 2021 at 04:02:17PM +0100, Paolo Bonzini wrote:
> On 05/01/21 01:49, Yang Zhong wrote:
> >A processor supports AVX_VNNI instructions if CPUID.(EAX=7,ECX=1):EAX[bit 4]
> >is present.
> >
> >This series includes kernel and kvm patches, kernel patch define this
> >new cpu feature bit and kvm expose this bit to guest. When this bit is
> >enabled on cpu or vcpu, the cpu feature flag is shown as "avx_vnni" in
> >/proc/cpuinfo of host and guest.
> >
> >Detailed information on the instruction and CPUID feature flag can be
> >found in the latest "extensions" manual [1].
> >
> >Reference:
> >[1]. https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html
> >
> >
> >Kyung Min Park (1):
> >   Enumerate AVX Vector Neural Network instructions
> >
> >Yang Zhong (1):
> >   KVM: Expose AVX_VNNI instruction to guset
> >
> >  arch/x86/include/asm/cpufeatures.h | 1 +
> >  arch/x86/kvm/cpuid.c               | 2 +-
> >  2 files changed, 2 insertions(+), 1 deletion(-)
> >
> 
> Queued, thanks.
> 
> Paolo

  Paolo, thanks, i will send the related Qemu patch soon.

  Yang

[PATCH 0/2] Enumerate and expose AVX_VNNI feature

[Yang Zhong]

A processor supports AVX_VNNI instructions if CPUID.(EAX=7,ECX=1):EAX[bit 4]
is present.

This series includes kernel and kvm patches, kernel patch define this
new cpu feature bit and kvm expose this bit to guest. When this bit is
enabled on cpu or vcpu, the cpu feature flag is shown as "avx_vnni" in
/proc/cpuinfo of host and guest.

Detailed information on the instruction and CPUID feature flag can be
found in the latest "extensions" manual [1].

Reference:
[1]. https://software.intel.com/content/www/us/en/develop/download/intel-architecture-instruction-set-extensions-programming-reference.html


Kyung Min Park (1):
  Enumerate AVX Vector Neural Network instructions

Yang Zhong (1):
  KVM: Expose AVX_VNNI instruction to guset

 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/kvm/cpuid.c               | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

-- 
2.29.2.334.gfaefdd61ec