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([2001:b07:6468:f312:a9f0:cbc3:a8a6:fc56]) by smtp.gmail.com with ESMTPSA id w19sm1077050wmc.22.2020.02.06.15.13.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 06 Feb 2020 15:13:08 -0800 (PST) Subject: Re: [PATCH v2 21/27] docs: kvm: Convert locking.txt to ReST format To: Mauro Carvalho Chehab Cc: Cornelia Huck , Linux Media Mailing List , Mauro Carvalho Chehab , Jonathan Corbet , kvm@vger.kernel.org, linux-doc@vger.kernel.org References: <1464d69fe780940cec6ecec4ac2505b9701a1e01.1581000481.git.mchehab+huawei@kernel.org> <20200206171132.4f51f17a.cohuck@redhat.com> <20200206234736.196ef417@kernel.org> From: Paolo Bonzini Message-ID: Date: Fri, 7 Feb 2020 00:13:05 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.1.1 MIME-Version: 1.0 In-Reply-To: <20200206234736.196ef417@kernel.org> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org On 06/02/20 23:47, Mauro Carvalho Chehab wrote: >> >> But the two headers should be "CPU 0" and "CPU 1", and it's worth >> changing that while we're at it. Same for the table below. > > Ok. > > Maybe we could append the enclosed patch to this one. I suspect it would > visually be better. Looks good to me, thanks. Paolo > > Cheers, > Mauro > > --- > > diff --git a/Documentation/virt/kvm/locking.rst b/Documentation/virt/kvm/locking.rst > index 428cb3412ecc..82322a4c9fde 100644 > --- a/Documentation/virt/kvm/locking.rst > +++ b/Documentation/virt/kvm/locking.rst > @@ -57,18 +57,18 @@ But we need carefully check these cases: > > The mapping from gfn to pfn may be changed since we can only ensure the pfn > is not changed during cmpxchg. This is a ABA problem, for example, below case > -will happen: > +will happen:: > > -At the beginning:: > + At the beginning: > > gpte = gfn1 > gfn1 is mapped to pfn1 on host > spte is the shadow page table entry corresponding with gpte and > spte = pfn1 > > - VCPU 0 VCPU0 > + On fast page fault path: > > -on fast page fault path:: > + CPU 0 CPU 1 > > old_spte = *spte; > pfn1 is swapped out: > @@ -80,6 +80,7 @@ on fast page fault path:: > gfn2 by the guest: > spte = pfn1; > > + > if (cmpxchg(spte, old_spte, old_spte+W) > mark_page_dirty(vcpu->kvm, gfn1) > OOPS!!! > @@ -107,16 +108,16 @@ spte is read-only and the Accessed bit has already been set since the > Accessed bit and Dirty bit can not be lost. > > But it is not true after fast page fault since the spte can be marked > -writable between reading spte and updating spte. Like below case: > +writable between reading spte and updating spte. Like below case:: > > -At the beginning:: > + At the beginning: > > spte.W = 0 > spte.Accessed = 1 > > - VCPU 0 VCPU0 > + CPU 0 CPU 1 > > -In mmu_spte_clear_track_bits():: > + In mmu_spte_clear_track_bits(): > > old_spte = *spte; > >