From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E7CBC433E0 for ; Wed, 27 May 2020 03:04:46 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id EC8A62075F for ; Wed, 27 May 2020 03:04:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EC8A62075F Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvmarm-bounces@lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 65C0D4B1D9; Tue, 26 May 2020 23:04:45 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id stCACfnfrPYz; Tue, 26 May 2020 23:04:44 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 3867D4B17D; Tue, 26 May 2020 23:04:44 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id DB9CB4B149 for ; Tue, 26 May 2020 23:04:42 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id p6z17IHcOUOG for ; Tue, 26 May 2020 23:04:40 -0400 (EDT) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 1642F4B1BE for ; Tue, 26 May 2020 23:04:40 -0400 (EDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8B9B030E; Tue, 26 May 2020 20:04:39 -0700 (PDT) Received: from p8cg001049571a15.arm.com (unknown [10.163.76.100]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D387E3F6C4; Tue, 26 May 2020 20:04:35 -0700 (PDT) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Subject: [PATCH V5 0/4] arm64/cpufeature: Introduce ID_PFR2, ID_DFR1, ID_MMFR5 and other changes Date: Wed, 27 May 2020 08:33:35 +0530 Message-Id: <1590548619-3441-1-git-send-email-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.7.4 Cc: Anshuman Khandual , catalin.marinas@arm.com, linux-kernel@vger.kernel.org, Marc Zyngier , will@kernel.org, kvmarm@lists.cs.columbia.edu X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu These are remaining patches from V4 series which had some pending reviews from Suzuki (https://patchwork.kernel.org/cover/11557333/). Also dropped [PATCH 15/17] as that will need some more investigation and rework. This series applies on arm64/for-next/cpufeature. Cc: Catalin Marinas Cc: Will Deacon Cc: Mark Rutland Cc: Marc Zyngier Cc: James Morse Cc: Suzuki K Poulose Cc: kvmarm@lists.cs.columbia.edu Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Changes in V5: - Dropped TGRAN features along with it's macros from ID_AA64MMFR0 per Suzuki - Replaced with FTR_HIGHER_SAFE for SpecSEI feature in ID_AA64MMFR1 per Suzuki - Dropped patch "arm64/cpufeature: Add remaining feature bits in ID_AA64DFR0 register" Changes in V4: (https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=290085) - Updated ftr_id_dfr0[] with a documentation for now missing [31:28] Tracfilt per Will - Fixed erroneous bit width value from 28 to 4 for double lock feature per Will - Replaced ID_SANITIZED() with ID_HIDDEN() for SYS_ID_DFR1_EL1 per Suzuki - Fixed positions for register definitions as per new name based grouping per Will - Replaced FTR_VISIBLE with FTR_HIDDEN for TLB feature in ID_AA64ISAR0 per Suzuki - Replaced FTR_VISIBLE with FTR_HIDDEN for MPAM and SEL2 in ID_AA64PFR0 per Suzuki - Replaced FTR_VISIBLE with FTR_HIDDEN for MPAMFRAC and RASFRAC in ID_AA64PFR1 per Suzuki - Dropped both MTE and BT features from ftr_id_aa64pfr1[] to be added later per Suzuki - Added ID_MMFR4_EL1 into the cpuinfo_arm64 context per Will Changes in V3: (https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=281211) - Rebased on git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git (for-next/cpufeature) Changes in V2: (https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=270605) - Added Suggested-by tag from Mark Rutland for all changes he had proposed - Added comment for SpecSEI feature on why it is HIGHER_SAFE per Suzuki - Added a patch which makes ID_AA64DFR0_DOUBLELOCK a signed feature per Suzuki - Added ID_DFR1 and ID_MMFR5 system register definitions per Will - Added remaining features bits for relevant 64 bit system registers per Will - Changed commit message on [PATCH 5/7] regarding TraceFilt feature per Suzuki - Changed ID_PFR2.CSV3 (FTR_STRICT -> FTR_NONSTRICT) as 64 bit registers per Will - Changed ID_PFR0.CSV2 (FTR_STRICT -> FTR_NONSTRICT) as 64 bit registers per Will - Changed some commit messages Changes in V1: (https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=234093) Anshuman Khandual (4): arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR0 register arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR1 register arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR2 register arm64/cpufeature: Replace all open bits shift encodings with macros arch/arm64/include/asm/sysreg.h | 42 +++++++++++++++++++++ arch/arm64/kernel/cpufeature.c | 67 ++++++++++++++++++++------------- 2 files changed, 83 insertions(+), 26 deletions(-) -- 2.20.1 _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm