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From: James Morse <james.morse@arm.com>
To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu
Cc: Marc Zyngier <marc.zyngier@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>
Subject: [PATCH v2 5/6] KVM: arm64: Defer guest entry when an asynchronous exception is pending
Date: Mon, 10 Jun 2019 17:24:26 +0100
Message-ID: <20190610162427.115910-6-james.morse@arm.com> (raw)
In-Reply-To: <20190610162427.115910-1-james.morse@arm.com>

SError that occur during world-switch's entry to the guest will be
accounted to the guest, as the exception is masked until we enter the
guest... but we want to attribute the SError as precisely as possible.

Reading DISR_EL1 before guest entry requires free registers, and using
ESB+DISR_EL1 to consume and read back the ESR would leave KVM holding
a host SError... We would rather leave the SError pending and let the
host take it once we exit world-switch. To do this, we need to defer
guest-entry if an SError is pending.

Read the ISR to see if SError (or an IRQ) is pending. If so fake an
exit. Place this check between __guest_enter()'s save of the host
registers, and restore of the guest's. SError that occur between
here and the ERET into the guest must have affected the guest's
registers, which we can naturally attribute to the guest.

The DSB is needed to ensure any previous writes have been done before
we read ISR_EL1. On systems without the v8.2 RAS extensions this
doesn't give us anything as we can't contain errors, and the ESR bits
to describe the severity are all implementation-defined. Replace
this with a nop for these systems.

Signed-off-by: James Morse <james.morse@arm.com>
Changes since v1:
 * Squashed later dsb/nop patch in here

 arch/arm64/kvm/hyp/entry.S | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/kvm/hyp/entry.S b/arch/arm64/kvm/hyp/entry.S
index 7863ec5266e2..a5a4254314a1 100644
--- a/arch/arm64/kvm/hyp/entry.S
+++ b/arch/arm64/kvm/hyp/entry.S
@@ -17,6 +17,7 @@
 #include <linux/linkage.h>
+#include <asm/alternative.h>
 #include <asm/asm-offsets.h>
 #include <asm/assembler.h>
 #include <asm/fpsimdmacros.h>
@@ -63,6 +64,19 @@ ENTRY(__guest_enter)
 	// Store the host regs
 	save_callee_saved_regs x1
+	// Now the host state is stored if we have a pending RAS SError it must
+	// affect the host. If any asyncronous exception is pending we defer
+	// the guest entry. The DSB isn't necessary before v8.2 as any SError
+	// would be fatal.
+alternative_if ARM64_HAS_RAS_EXTN
+	dsb	nshst
+	mrs	x1, isr_el1
+	cbz	x1,  1f
+	ret
 	add	x18, x0, #VCPU_CONTEXT
 	// Macro ptrauth_switch_to_guest format:

kvmarm mailing list

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Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-10 16:24 [PATCH v2 0/6] KVM: arm64: Account host/guest SError more precisely (Neoverse-N1 #1349291) James Morse
2019-06-10 16:24 ` [PATCH v2 1/6] arm64: assember: Switch ESB-instruction with a vanilla nop if !ARM64_HAS_RAS James Morse
2019-06-10 16:24 ` [PATCH v2 2/6] KVM: arm64: Abstract the size of the HYP vectors pre-amble James Morse
2019-06-10 16:24 ` [PATCH v2 3/6] KVM: arm64: Make indirect vectors preamble behaviour symmetric James Morse
2019-06-10 16:24 ` [PATCH v2 4/6] KVM: arm64: Consume pending SError as early as possible James Morse
2019-06-10 16:24 ` James Morse [this message]
2019-06-10 17:01   ` [PATCH v2 5/6] KVM: arm64: Defer guest entry when an asynchronous exception is pending Marc Zyngier
2019-06-10 16:24 ` [PATCH v2 6/6] arm64: Update silicon-errata.txt for Neoverse-N1 #1349291 James Morse

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