From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5FC1AC43613 for ; Mon, 24 Jun 2019 11:38:27 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id EC83820674 for ; Mon, 24 Jun 2019 11:38:26 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EC83820674 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvmarm-bounces@lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 466604A51D; Mon, 24 Jun 2019 07:38:26 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8jMnikaGiDGm; Mon, 24 Jun 2019 07:38:24 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id F107C4A508; Mon, 24 Jun 2019 07:38:24 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 772CD4A4A3 for ; Mon, 24 Jun 2019 07:38:23 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Y5H3GdPlFY+j for ; Mon, 24 Jun 2019 07:38:22 -0400 (EDT) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mm01.cs.columbia.edu (Postfix) with ESMTP id EDC3E4A332 for ; Mon, 24 Jun 2019 07:38:21 -0400 (EDT) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 98B262B; Mon, 24 Jun 2019 04:38:21 -0700 (PDT) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 438093F718; Mon, 24 Jun 2019 04:38:20 -0700 (PDT) Date: Mon, 24 Jun 2019 12:38:18 +0100 From: Dave Martin To: Marc Zyngier Subject: Re: [PATCH 05/59] KVM: arm64: nv: Reset VCPU to EL2 registers if VCPU nested virt is set Message-ID: <20190624113817.GN2790@e103592.cambridge.arm.com> References: <20190621093843.220980-1-marc.zyngier@arm.com> <20190621093843.220980-6-marc.zyngier@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190621093843.220980-6-marc.zyngier@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Cc: kvm@vger.kernel.org, Andre Przywara , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Fri, Jun 21, 2019 at 10:37:49AM +0100, Marc Zyngier wrote: > From: Christoffer Dall > > Reset the VCPU with PSTATE.M = EL2h when the nested virtualization > feature is enabled on the VCPU. > > Signed-off-by: Christoffer Dall > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/reset.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/arm64/kvm/reset.c b/arch/arm64/kvm/reset.c > index 1140b4485575..675ca07dbb05 100644 > --- a/arch/arm64/kvm/reset.c > +++ b/arch/arm64/kvm/reset.c > @@ -52,6 +52,11 @@ static const struct kvm_regs default_regs_reset = { > PSR_F_BIT | PSR_D_BIT), > }; > > +static const struct kvm_regs default_regs_reset_el2 = { > + .regs.pstate = (PSR_MODE_EL2h | PSR_A_BIT | PSR_I_BIT | > + PSR_F_BIT | PSR_D_BIT), > +}; > + Is it worth having a #define for the common non-mode bits? It's a bit weird for EL2 and EL1 to have indepedent DAIF defaults. Putting a big block of zeros in the kernel text just to initialise one register seems overkill. Now we're adding a third block of zeros, maybe this is worth refactoring? We really just need a memset(0) followed by config-dependent initialisation of regs.pstate AFAICT. Not a big deal though: this doesn't look like a high risk for maintainability. Cheers ---Dave > static const struct kvm_regs default_regs_reset32 = { > .regs.pstate = (PSR_AA32_MODE_SVC | PSR_AA32_A_BIT | > PSR_AA32_I_BIT | PSR_AA32_F_BIT), > @@ -302,6 +307,8 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) > if (!cpu_has_32bit_el1()) > goto out; > cpu_reset = &default_regs_reset32; > + } else if (test_bit(KVM_ARM_VCPU_NESTED_VIRT, vcpu->arch.features)) { > + cpu_reset = &default_regs_reset_el2; > } else { > cpu_reset = &default_regs_reset; > } > -- > 2.20.1 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm