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Fri, 7 Feb 2020 12:14:44 +0000 (UTC) Received: from kamzik.brq.redhat.com (unknown [10.43.2.160]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4393D5C541; Fri, 7 Feb 2020 12:14:39 +0000 (UTC) Date: Fri, 7 Feb 2020 13:14:37 +0100 From: Andrew Jones To: Eric Auger Subject: Re: [kvm-unit-tests PATCH v3 07/14] arm/arm64: gicv3: Enable/Disable LPIs at re-distributor level Message-ID: <20200207121437.qtvonx2x2xh3dvgc@kamzik.brq.redhat.com> References: <20200128103459.19413-1-eric.auger@redhat.com> <20200128103459.19413-8-eric.auger@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20200128103459.19413-8-eric.auger@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 Cc: thuth@redhat.com, kvm@vger.kernel.org, maz@kernel.org, qemu-devel@nongnu.org, qemu-arm@nongnu.org, andre.przywara@arm.com, kvmarm@lists.cs.columbia.edu, eric.auger.pro@gmail.com X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On Tue, Jan 28, 2020 at 11:34:52AM +0100, Eric Auger wrote: > This helper function controls the signaling of LPIs at > redistributor level. > > Signed-off-by: Eric Auger > > --- > > v2 -> v3: > - move the helper in lib/arm/gic-v3.c > - rename the function with gicv3_lpi_ prefix > - s/report_abort/assert > --- > lib/arm/asm/gic-v3.h | 1 + > lib/arm/gic-v3.c | 17 +++++++++++++++++ > 2 files changed, 18 insertions(+) > > diff --git a/lib/arm/asm/gic-v3.h b/lib/arm/asm/gic-v3.h > index ec2a6f0..734c0c0 100644 > --- a/lib/arm/asm/gic-v3.h > +++ b/lib/arm/asm/gic-v3.h > @@ -96,6 +96,7 @@ extern void gicv3_lpi_set_config(int n, u8 val); > extern u8 gicv3_lpi_get_config(int n); > extern void gicv3_lpi_set_pending_table_bit(int rdist, int n, bool set); > extern void gicv3_lpi_alloc_tables(void); > +extern void gicv3_lpi_rdist_ctrl(u32 redist, bool set); > > static inline void gicv3_do_wait_for_rwp(void *base) > { > diff --git a/lib/arm/gic-v3.c b/lib/arm/gic-v3.c > index c33f883..7865d01 100644 > --- a/lib/arm/gic-v3.c > +++ b/lib/arm/gic-v3.c > @@ -210,4 +210,21 @@ void gicv3_lpi_set_pending_table_bit(int rdist, int n, bool set) > byte &= ~mask; > *ptr = byte; > } > + > +void gicv3_lpi_rdist_ctrl(u32 redist, bool set) _set_clr_ ? > +{ > + void *ptr; > + u64 val; > + > + assert(redist < nr_cpus); > + > + ptr = gicv3_data.redist_base[redist]; > + val = readl(ptr + GICR_CTLR); > + if (set) > + val |= GICR_CTLR_ENABLE_LPIS; > + else > + val &= ~GICR_CTLR_ENABLE_LPIS; > + writel(val, ptr + GICR_CTLR); > +} > #endif /* __aarch64__ */ > + stray blank line here > -- > 2.20.1 > I'm not sure why this needs its own patch. I could just be part of the next patch. Thanks, drew _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm