From: Eric Auger <eric.auger@redhat.com>
To: eric.auger.pro@gmail.com, eric.auger@redhat.com,
iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu,
joro@8bytes.org, alex.williamson@redhat.com,
jacob.jun.pan@linux.intel.com, yi.l.liu@intel.com,
jean-philippe.brucker@arm.com, will.deacon@arm.com,
robin.murphy@arm.com
Cc: marc.zyngier@arm.com
Subject: [PATCH v10 11/13] iommu/smmuv3: Enforce incompatibility between nested mode and HW MSI regions
Date: Fri, 20 Mar 2020 17:09:30 +0100 [thread overview]
Message-ID: <20200320160932.27222-12-eric.auger@redhat.com> (raw)
In-Reply-To: <20200320160932.27222-1-eric.auger@redhat.com>
Nested mode currently is not compatible with HW MSI reserved regions.
Indeed MSI transactions targeting this MSI doorbells bypass the SMMU.
Let's check nested mode is not attempted in such configuration.
Signed-off-by: Eric Auger <eric.auger@redhat.com>
---
drivers/iommu/arm-smmu-v3.c | 23 +++++++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 84dce0b2e935..106f9c563823 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -2921,6 +2921,23 @@ static bool arm_smmu_share_msi_domain(struct iommu_domain *domain,
return share;
}
+static bool arm_smmu_has_hw_msi_resv_region(struct device *dev)
+{
+ struct iommu_resv_region *region;
+ bool has_msi_resv_region = false;
+ LIST_HEAD(resv_regions);
+
+ iommu_get_resv_regions(dev, &resv_regions);
+ list_for_each_entry(region, &resv_regions, list) {
+ if (region->type == IOMMU_RESV_MSI) {
+ has_msi_resv_region = true;
+ break;
+ }
+ }
+ iommu_put_resv_regions(dev, &resv_regions);
+ return has_msi_resv_region;
+}
+
static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
{
int ret = 0;
@@ -2965,10 +2982,12 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev)
/*
* In nested mode we must check all devices belonging to the
* domain share the same physical MSI doorbell. Otherwise nested
- * stage MSI binding is not supported.
+ * stage MSI binding is not supported. Also nested mode is not
+ * compatible with MSI HW reserved regions.
*/
if (smmu_domain->stage == ARM_SMMU_DOMAIN_NESTED &&
- !arm_smmu_share_msi_domain(domain, dev)) {
+ (!arm_smmu_share_msi_domain(domain, dev) ||
+ arm_smmu_has_hw_msi_resv_region(dev))) {
ret = -EINVAL;
goto out_unlock;
}
--
2.20.1
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next prev parent reply other threads:[~2020-03-20 16:11 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-20 16:09 [PATCH v10 00/13] SMMUv3 Nested Stage Setup (IOMMU part) Eric Auger
2020-03-20 16:09 ` [PATCH v10 01/13] iommu: Introduce attach/detach_pasid_table API Eric Auger
2020-03-20 16:09 ` [PATCH v10 02/13] iommu: Introduce bind/unbind_guest_msi Eric Auger
2020-03-20 16:09 ` [PATCH v10 03/13] iommu/arm-smmu-v3: Maintain a SID->device structure Eric Auger
2020-03-20 16:09 ` [PATCH v10 04/13] iommu/smmuv3: Dynamically allocate s1_cfg and s2_cfg Eric Auger
2020-03-20 16:09 ` [PATCH v10 05/13] iommu/smmuv3: Get prepared for nested stage support Eric Auger
2020-03-20 16:09 ` [PATCH v10 06/13] iommu/smmuv3: Implement attach/detach_pasid_table Eric Auger
2020-03-20 16:09 ` [PATCH v10 07/13] iommu/smmuv3: Allow stage 1 invalidation with unmanaged ASIDs Eric Auger
2020-03-20 16:09 ` [PATCH v10 08/13] iommu/smmuv3: Implement cache_invalidate Eric Auger
2020-03-20 16:09 ` [PATCH v10 09/13] dma-iommu: Implement NESTED_MSI cookie Eric Auger
2020-03-20 22:20 ` kbuild test robot
2020-03-20 16:09 ` [PATCH v10 10/13] iommu/smmuv3: Nested mode single MSI doorbell per domain enforcement Eric Auger
2020-03-20 16:09 ` Eric Auger [this message]
2020-03-20 16:09 ` [PATCH v10 12/13] iommu/smmuv3: Implement bind/unbind_guest_msi Eric Auger
2020-03-20 16:09 ` [PATCH v10 13/13] iommu/smmuv3: Report non recoverable faults Eric Auger
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