* [PATCH V5 0/4] arm64/cpufeature: Introduce ID_PFR2, ID_DFR1, ID_MMFR5 and other changes
@ 2020-05-27 3:03 Anshuman Khandual
2020-07-02 17:34 ` Catalin Marinas
0 siblings, 1 reply; 3+ messages in thread
From: Anshuman Khandual @ 2020-05-27 3:03 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Anshuman Khandual, catalin.marinas, linux-kernel, Marc Zyngier,
will, kvmarm
These are remaining patches from V4 series which had some pending reviews
from Suzuki (https://patchwork.kernel.org/cover/11557333/). Also dropped
[PATCH 15/17] as that will need some more investigation and rework.
This series applies on arm64/for-next/cpufeature.
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: James Morse <james.morse@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: kvmarm@lists.cs.columbia.edu
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Changes in V5:
- Dropped TGRAN features along with it's macros from ID_AA64MMFR0 per Suzuki
- Replaced with FTR_HIGHER_SAFE for SpecSEI feature in ID_AA64MMFR1 per Suzuki
- Dropped patch "arm64/cpufeature: Add remaining feature bits in ID_AA64DFR0 register"
Changes in V4: (https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=290085)
- Updated ftr_id_dfr0[] with a documentation for now missing [31:28] Tracfilt per Will
- Fixed erroneous bit width value from 28 to 4 for double lock feature per Will
- Replaced ID_SANITIZED() with ID_HIDDEN() for SYS_ID_DFR1_EL1 per Suzuki
- Fixed positions for register definitions as per new name based grouping per Will
- Replaced FTR_VISIBLE with FTR_HIDDEN for TLB feature in ID_AA64ISAR0 per Suzuki
- Replaced FTR_VISIBLE with FTR_HIDDEN for MPAM and SEL2 in ID_AA64PFR0 per Suzuki
- Replaced FTR_VISIBLE with FTR_HIDDEN for MPAMFRAC and RASFRAC in ID_AA64PFR1 per Suzuki
- Dropped both MTE and BT features from ftr_id_aa64pfr1[] to be added later per Suzuki
- Added ID_MMFR4_EL1 into the cpuinfo_arm64 context per Will
Changes in V3: (https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=281211)
- Rebased on git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git (for-next/cpufeature)
Changes in V2: (https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=270605)
- Added Suggested-by tag from Mark Rutland for all changes he had proposed
- Added comment for SpecSEI feature on why it is HIGHER_SAFE per Suzuki
- Added a patch which makes ID_AA64DFR0_DOUBLELOCK a signed feature per Suzuki
- Added ID_DFR1 and ID_MMFR5 system register definitions per Will
- Added remaining features bits for relevant 64 bit system registers per Will
- Changed commit message on [PATCH 5/7] regarding TraceFilt feature per Suzuki
- Changed ID_PFR2.CSV3 (FTR_STRICT -> FTR_NONSTRICT) as 64 bit registers per Will
- Changed ID_PFR0.CSV2 (FTR_STRICT -> FTR_NONSTRICT) as 64 bit registers per Will
- Changed some commit messages
Changes in V1: (https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=234093)
Anshuman Khandual (4):
arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR0 register
arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR1 register
arm64/cpufeature: Add remaining feature bits in ID_AA64MMFR2 register
arm64/cpufeature: Replace all open bits shift encodings with macros
arch/arm64/include/asm/sysreg.h | 42 +++++++++++++++++++++
arch/arm64/kernel/cpufeature.c | 67 ++++++++++++++++++++-------------
2 files changed, 83 insertions(+), 26 deletions(-)
--
2.20.1
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* Re: [PATCH V5 0/4] arm64/cpufeature: Introduce ID_PFR2, ID_DFR1, ID_MMFR5 and other changes
2020-05-27 3:03 [PATCH V5 0/4] arm64/cpufeature: Introduce ID_PFR2, ID_DFR1, ID_MMFR5 and other changes Anshuman Khandual
@ 2020-07-02 17:34 ` Catalin Marinas
2020-07-03 11:54 ` Anshuman Khandual
0 siblings, 1 reply; 3+ messages in thread
From: Catalin Marinas @ 2020-07-02 17:34 UTC (permalink / raw)
To: Anshuman Khandual
Cc: Marc Zyngier, linux-kernel, will, kvmarm, linux-arm-kernel
On Wed, May 27, 2020 at 08:33:35AM +0530, Anshuman Khandual wrote:
> These are remaining patches from V4 series which had some pending reviews
> from Suzuki (https://patchwork.kernel.org/cover/11557333/). Also dropped
> [PATCH 15/17] as that will need some more investigation and rework.
>
> This series applies on arm64/for-next/cpufeature.
>
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Marc Zyngier <maz@kernel.org>
> Cc: James Morse <james.morse@arm.com>
> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
> Cc: kvmarm@lists.cs.columbia.edu
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
Thanks Suzuki for review.
Anshuman, could you please rebase this series on top of 5.8-rc3? It no
longer applies cleanly.
Thanks.
--
Catalin
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH V5 0/4] arm64/cpufeature: Introduce ID_PFR2, ID_DFR1, ID_MMFR5 and other changes
2020-07-02 17:34 ` Catalin Marinas
@ 2020-07-03 11:54 ` Anshuman Khandual
0 siblings, 0 replies; 3+ messages in thread
From: Anshuman Khandual @ 2020-07-03 11:54 UTC (permalink / raw)
To: Catalin Marinas
Cc: Marc Zyngier, linux-kernel, will, kvmarm, linux-arm-kernel
On 07/02/2020 11:04 PM, Catalin Marinas wrote:
> On Wed, May 27, 2020 at 08:33:35AM +0530, Anshuman Khandual wrote:
>> These are remaining patches from V4 series which had some pending reviews
>> from Suzuki (https://patchwork.kernel.org/cover/11557333/). Also dropped
>> [PATCH 15/17] as that will need some more investigation and rework.
>>
>> This series applies on arm64/for-next/cpufeature.
>>
>> Cc: Catalin Marinas <catalin.marinas@arm.com>
>> Cc: Will Deacon <will@kernel.org>
>> Cc: Mark Rutland <mark.rutland@arm.com>
>> Cc: Marc Zyngier <maz@kernel.org>
>> Cc: James Morse <james.morse@arm.com>
>> Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
>> Cc: kvmarm@lists.cs.columbia.edu
>> Cc: linux-arm-kernel@lists.infradead.org
>> Cc: linux-kernel@vger.kernel.org
>
> Thanks Suzuki for review.
>
> Anshuman, could you please rebase this series on top of 5.8-rc3? It no
> longer applies cleanly.
Already posted here.
https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=312281
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^ permalink raw reply [flat|nested] 3+ messages in thread
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2020-05-27 3:03 [PATCH V5 0/4] arm64/cpufeature: Introduce ID_PFR2, ID_DFR1, ID_MMFR5 and other changes Anshuman Khandual
2020-07-02 17:34 ` Catalin Marinas
2020-07-03 11:54 ` Anshuman Khandual
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