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From: Will Deacon <will@kernel.org>
To: kvmarm@lists.cs.columbia.edu
Cc: Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>,
	kernel-team@android.com, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/4] KVM: arm64: Don't skip cache maintenance for read-only memslots
Date: Wed, 29 Jul 2020 11:28:20 +0100
Message-ID: <20200729102821.23392-4-will@kernel.org> (raw)
In-Reply-To: <20200729102821.23392-1-will@kernel.org>

If a guest performs cache maintenance on a read-only memslot, we should
inform userspace rather than skip the instruction altogether.

Cc: Marc Zyngier <maz@kernel.org>
Cc: Quentin Perret <qperret@google.com>
Signed-off-by: Will Deacon <will@kernel.org>
---
 arch/arm64/kvm/mmu.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
index 96d995a1ef68..4150bce3d0b6 100644
--- a/arch/arm64/kvm/mmu.c
+++ b/arch/arm64/kvm/mmu.c
@@ -2121,7 +2121,7 @@ int kvm_handle_guest_abort(struct kvm_vcpu *vcpu, struct kvm_run *run)
 		 * So let's assume that the guest is just being
 		 * cautious, and skip the instruction.
 		 */
-		if (kvm_vcpu_dabt_is_cm(vcpu)) {
+		if (kvm_is_error_hva(hva) && kvm_vcpu_dabt_is_cm(vcpu)) {
 			kvm_skip_instr(vcpu, kvm_vcpu_trap_il_is32bit(vcpu));
 			ret = 1;
 			goto out_unlock;
-- 
2.28.0.rc0.142.g3c755180ce-goog

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Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-29 10:28 [PATCH v2 0/4] KVM: arm64: Fixes to early stage-2 fault handling Will Deacon
2020-07-29 10:28 ` [PATCH v2 1/4] KVM: arm64: Rename kvm_vcpu_dabt_isextabt() Will Deacon
2020-07-29 10:28 ` [PATCH v2 2/4] KVM: arm64: Handle data and instruction external aborts the same way Will Deacon
2020-07-29 10:28 ` Will Deacon [this message]
2020-07-29 10:28 ` [PATCH v2 4/4] KVM: arm64: Move S1PTW S2 fault logic out of io_mem_abort() Will Deacon
2020-07-30 15:06 ` [PATCH v2 0/4] KVM: arm64: Fixes to early stage-2 fault handling Marc Zyngier

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