From: David Brazdil <dbrazdil@google.com>
To: kvmarm@lists.cs.columbia.edu
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
kernel-team@android.com, Jonathan Corbet <corbet@lwn.net>,
Catalin Marinas <catalin.marinas@arm.com>,
linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org,
Sudeep Holla <sudeep.holla@arm.com>,
linux-arm-kernel@lists.infradead.org,
Marc Zyngier <maz@kernel.org>, Tejun Heo <tj@kernel.org>,
Dennis Zhou <dennis@kernel.org>, Christoph Lameter <cl@linux.com>,
Will Deacon <will@kernel.org>
Subject: [PATCH v4 11/26] kvm: arm64: Init MAIR/TCR_EL2 from params struct
Date: Wed, 2 Dec 2020 18:41:07 +0000 [thread overview]
Message-ID: <20201202184122.26046-12-dbrazdil@google.com> (raw)
In-Reply-To: <20201202184122.26046-1-dbrazdil@google.com>
MAIR_EL2 and TCR_EL2 are currently initialized from their _EL1 values.
This will not work once KVM starts intercepting PSCI ON/SUSPEND SMCs
and initializing EL2 state before EL1 state.
Obtain the EL1 values during KVM init and store them in the init params
struct. The struct will stay in memory and can be used when booting new
cores.
Take the opportunity to move copying the T0SZ value from idmap_t0sz in
KVM init rather than in .hyp.idmap.text. This avoids the need for the
idmap_t0sz symbol alias.
Signed-off-by: David Brazdil <dbrazdil@google.com>
---
arch/arm64/include/asm/kvm_asm.h | 2 ++
arch/arm64/kernel/asm-offsets.c | 2 ++
arch/arm64/kernel/image-vars.h | 3 ---
arch/arm64/kvm/arm.c | 22 +++++++++++++++++
arch/arm64/kvm/hyp/nvhe/hyp-init.S | 38 +++++++-----------------------
5 files changed, 34 insertions(+), 33 deletions(-)
diff --git a/arch/arm64/include/asm/kvm_asm.h b/arch/arm64/include/asm/kvm_asm.h
index 1a7b91534a16..7ccf770c53d9 100644
--- a/arch/arm64/include/asm/kvm_asm.h
+++ b/arch/arm64/include/asm/kvm_asm.h
@@ -149,6 +149,8 @@ extern void *__vhe_undefined_symbol;
#endif
struct kvm_nvhe_init_params {
+ unsigned long mair_el2;
+ unsigned long tcr_el2;
unsigned long tpidr_el2;
unsigned long stack_hyp_va;
phys_addr_t pgd_pa;
diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
index 8d6272a01a00..ba01185ef281 100644
--- a/arch/arm64/kernel/asm-offsets.c
+++ b/arch/arm64/kernel/asm-offsets.c
@@ -110,6 +110,8 @@ int main(void)
DEFINE(CPU_APGAKEYLO_EL1, offsetof(struct kvm_cpu_context, sys_regs[APGAKEYLO_EL1]));
DEFINE(HOST_CONTEXT_VCPU, offsetof(struct kvm_cpu_context, __hyp_running_vcpu));
DEFINE(HOST_DATA_CONTEXT, offsetof(struct kvm_host_data, host_ctxt));
+ DEFINE(NVHE_INIT_MAIR_EL2, offsetof(struct kvm_nvhe_init_params, mair_el2));
+ DEFINE(NVHE_INIT_TCR_EL2, offsetof(struct kvm_nvhe_init_params, tcr_el2));
DEFINE(NVHE_INIT_TPIDR_EL2, offsetof(struct kvm_nvhe_init_params, tpidr_el2));
DEFINE(NVHE_INIT_STACK_HYP_VA, offsetof(struct kvm_nvhe_init_params, stack_hyp_va));
DEFINE(NVHE_INIT_PGD_PA, offsetof(struct kvm_nvhe_init_params, pgd_pa));
diff --git a/arch/arm64/kernel/image-vars.h b/arch/arm64/kernel/image-vars.h
index 4b32588918d9..08e69faedf6c 100644
--- a/arch/arm64/kernel/image-vars.h
+++ b/arch/arm64/kernel/image-vars.h
@@ -77,9 +77,6 @@ KVM_NVHE_ALIAS(panic);
/* Vectors installed by hyp-init on reset HVC. */
KVM_NVHE_ALIAS(__hyp_stub_vectors);
-/* IDMAP TCR_EL1.T0SZ as computed by the EL1 init code */
-KVM_NVHE_ALIAS(idmap_t0sz);
-
/* Kernel symbol used by icache_is_vpipt(). */
KVM_NVHE_ALIAS(__icache_flags);
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 93a408c00249..6c8594378865 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -1387,6 +1387,7 @@ static void cpu_init_hyp_mode(void)
{
struct kvm_nvhe_init_params *params = this_cpu_ptr_nvhe_sym(kvm_init_params);
struct arm_smccc_res res;
+ unsigned long tcr;
/* Switch from the HYP stub to our own HYP init vector */
__hyp_set_vectors(kvm_get_idmap_vector());
@@ -1399,6 +1400,27 @@ static void cpu_init_hyp_mode(void)
params->tpidr_el2 = (unsigned long)this_cpu_ptr_nvhe_sym(__per_cpu_start) -
(unsigned long)kvm_ksym_ref(CHOOSE_NVHE_SYM(__per_cpu_start));
+ params->mair_el2 = read_sysreg(mair_el1);
+
+ /*
+ * The ID map may be configured to use an extended virtual address
+ * range. This is only the case if system RAM is out of range for the
+ * currently configured page size and VA_BITS, in which case we will
+ * also need the extended virtual range for the HYP ID map, or we won't
+ * be able to enable the EL2 MMU.
+ *
+ * However, at EL2, there is only one TTBR register, and we can't switch
+ * between translation tables *and* update TCR_EL2.T0SZ at the same
+ * time. Bottom line: we need to use the extended range with *both* our
+ * translation tables.
+ *
+ * So use the same T0SZ value we use for the ID map.
+ */
+ tcr = (read_sysreg(tcr_el1) & TCR_EL2_MASK) | TCR_EL2_RES1;
+ tcr &= ~TCR_T0SZ_MASK;
+ tcr |= (idmap_t0sz & GENMASK(TCR_TxSZ_WIDTH - 1, 0)) << TCR_T0SZ_OFFSET;
+ params->tcr_el2 = tcr;
+
params->stack_hyp_va = kern_hyp_va(__this_cpu_read(kvm_arm_hyp_stack_page) + PAGE_SIZE);
params->pgd_pa = kvm_mmu_get_httbr();
diff --git a/arch/arm64/kvm/hyp/nvhe/hyp-init.S b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
index e712e317337c..712f57289357 100644
--- a/arch/arm64/kvm/hyp/nvhe/hyp-init.S
+++ b/arch/arm64/kvm/hyp/nvhe/hyp-init.S
@@ -71,48 +71,26 @@ __do_hyp_init:
1: ldr x0, [x1, #NVHE_INIT_TPIDR_EL2]
msr tpidr_el2, x0
+ ldr x0, [x1, #NVHE_INIT_MAIR_EL2]
+ msr mair_el2, x0
+
ldr x0, [x1, #NVHE_INIT_STACK_HYP_VA]
mov sp, x0
- ldr x1, [x1, #NVHE_INIT_PGD_PA]
- phys_to_ttbr x0, x1
+ ldr x0, [x1, #NVHE_INIT_PGD_PA]
+ phys_to_ttbr x2, x0
alternative_if ARM64_HAS_CNP
- orr x0, x0, #TTBR_CNP_BIT
+ orr x2, x2, #TTBR_CNP_BIT
alternative_else_nop_endif
- msr ttbr0_el2, x0
-
- mrs x0, tcr_el1
- mov_q x1, TCR_EL2_MASK
- and x0, x0, x1
- mov x1, #TCR_EL2_RES1
- orr x0, x0, x1
-
- /*
- * The ID map may be configured to use an extended virtual address
- * range. This is only the case if system RAM is out of range for the
- * currently configured page size and VA_BITS, in which case we will
- * also need the extended virtual range for the HYP ID map, or we won't
- * be able to enable the EL2 MMU.
- *
- * However, at EL2, there is only one TTBR register, and we can't switch
- * between translation tables *and* update TCR_EL2.T0SZ at the same
- * time. Bottom line: we need to use the extended range with *both* our
- * translation tables.
- *
- * So use the same T0SZ value we use for the ID map.
- */
- ldr_l x1, idmap_t0sz
- bfi x0, x1, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH
+ msr ttbr0_el2, x2
/*
* Set the PS bits in TCR_EL2.
*/
+ ldr x0, [x1, #NVHE_INIT_TCR_EL2]
tcr_compute_pa_size x0, #TCR_EL2_PS_SHIFT, x1, x2
-
msr tcr_el2, x0
- mrs x0, mair_el1
- msr mair_el2, x0
isb
/* Invalidate the stale TLBs from Bootloader */
--
2.29.2.454.gaff20da3a2-goog
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next prev parent reply other threads:[~2020-12-02 18:41 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-02 18:40 [PATCH v4 00/26] Opt-in always-on nVHE hypervisor David Brazdil
2020-12-02 18:40 ` [PATCH v4 01/26] kvm: arm64: Add kvm-arm.mode early kernel parameter David Brazdil
2020-12-02 18:40 ` [PATCH v4 02/26] kvm: arm64: Add ARM64_KVM_PROTECTED_MODE CPU capability David Brazdil
2020-12-02 18:40 ` [PATCH v4 03/26] psci: Support psci_ops.get_version for v0.1 David Brazdil
2020-12-02 18:41 ` [PATCH v4 04/26] psci: Split functions to v0.1 and v0.2+ variants David Brazdil
2020-12-03 10:42 ` Mark Rutland
2020-12-02 18:41 ` [PATCH v4 05/26] psci: Replace psci_function_id array with a struct David Brazdil
2020-12-03 10:43 ` Mark Rutland
2020-12-02 18:41 ` [PATCH v4 06/26] psci: Add accessor for psci_0_1_function_ids David Brazdil
2020-12-03 10:47 ` Mark Rutland
2020-12-03 10:51 ` David Brazdil
2020-12-02 18:41 ` [PATCH v4 07/26] arm64: Make cpu_logical_map() take unsigned int David Brazdil
2020-12-02 18:41 ` [PATCH v4 08/26] arm64: Extract parts of el2_setup into a macro David Brazdil
2020-12-02 18:41 ` [PATCH v4 09/26] kvm: arm64: Remove vector_ptr param of hyp-init David Brazdil
2020-12-02 18:41 ` [PATCH v4 10/26] kvm: arm64: Move hyp-init params to a per-CPU struct David Brazdil
2020-12-02 18:41 ` David Brazdil [this message]
2020-12-02 18:41 ` [PATCH v4 12/26] kvm: arm64: Add .hyp.data..ro_after_init ELF section David Brazdil
2020-12-02 18:41 ` [PATCH v4 13/26] kvm: arm64: Support per_cpu_ptr in nVHE hyp code David Brazdil
2020-12-02 18:41 ` [PATCH v4 14/26] kvm: arm64: Create nVHE copy of cpu_logical_map David Brazdil
2020-12-02 18:41 ` [PATCH v4 15/26] kvm: arm64: Add SMC handler in nVHE EL2 David Brazdil
2020-12-03 13:31 ` Marc Zyngier
2020-12-02 18:41 ` [PATCH v4 16/26] kvm: arm64: Bootstrap PSCI " David Brazdil
2020-12-03 10:55 ` Mark Rutland
2020-12-03 13:46 ` Marc Zyngier
2020-12-02 18:41 ` [PATCH v4 17/26] kvm: arm64: Add offset for hyp VA <-> PA conversion David Brazdil
2020-12-07 22:29 ` Qian Cai
2020-12-08 10:08 ` David Brazdil
2020-12-02 18:41 ` [PATCH v4 18/26] kvm: arm64: Forward safe PSCI SMCs coming from host David Brazdil
2020-12-02 18:41 ` [PATCH v4 19/26] kvm: arm64: Extract __do_hyp_init into a helper function David Brazdil
2020-12-02 18:41 ` [PATCH v4 20/26] kvm: arm64: Add function to enter host from KVM nVHE hyp code David Brazdil
2020-12-02 18:41 ` [PATCH v4 21/26] kvm: arm64: Intercept host's CPU_ON SMCs David Brazdil
2020-12-02 18:41 ` [PATCH v4 22/26] kvm: arm64: Intercept host's CPU_SUSPEND PSCI SMCs David Brazdil
2020-12-02 18:41 ` [PATCH v4 23/26] kvm: arm64: Intercept host's SYSTEM_SUSPEND " David Brazdil
2020-12-02 18:41 ` [PATCH v4 24/26] kvm: arm64: Keep nVHE EL2 vector installed David Brazdil
2020-12-02 18:41 ` [PATCH v4 25/26] kvm: arm64: Trap host SMCs in protected mode David Brazdil
2020-12-02 18:41 ` [PATCH v4 26/26] kvm: arm64: Fix EL2 mode availability checks David Brazdil
2020-12-03 19:23 ` [PATCH v4 00/26] Opt-in always-on nVHE hypervisor Marc Zyngier
2020-12-08 19:14 ` David Brazdil
2020-12-08 20:12 ` Marc Zyngier
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