From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org
Cc: Prasad Sodagudi <psodagud@codeaurora.org>,
Srinivas Ramana <sramana@codeaurora.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Ajay Patil <pajay@qti.qualcomm.com>,
kernel-team@android.com, Will Deacon <will@kernel.org>,
Ard Biesheuvel <ardb@kernel.org>
Subject: [PATCH v5 13/21] arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line
Date: Mon, 25 Jan 2021 10:50:11 +0000 [thread overview]
Message-ID: <20210125105019.2946057-14-maz@kernel.org> (raw)
In-Reply-To: <20210125105019.2946057-1-maz@kernel.org>
As we want to be able to disable VHE at runtime, let's match
"id_aa64mmfr1.vh=" from the command line as an override.
This doesn't have much effect yet as our boot code doesn't look
at the cpufeature, but only at the HW registers.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Acked-by: David Brazdil <dbrazdil@google.com>
---
arch/arm64/include/asm/cpufeature.h | 2 ++
arch/arm64/kernel/cpufeature.c | 5 ++++-
arch/arm64/kernel/idreg-override.c | 11 +++++++++++
3 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 4179cfc8ed57..b0ed37da4067 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -818,6 +818,8 @@ static inline unsigned int get_vmid_bits(u64 mmfr1)
return 8;
}
+extern struct arm64_ftr_override id_aa64mmfr1_override;
+
u32 get_kvm_ipa_limit(void);
void dump_cpu_features(void);
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 4b84a1e1dc51..c1d6712c4249 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -557,6 +557,8 @@ static const struct arm64_ftr_bits ftr_raz[] = {
#define ARM64_FTR_REG(id, table) ARM64_FTR_REG_OVERRIDE(id, table, &no_override)
+struct arm64_ftr_override id_aa64mmfr1_override;
+
static const struct __ftr_reg_entry {
u32 sys_id;
struct arm64_ftr_reg *reg;
@@ -604,7 +606,8 @@ static const struct __ftr_reg_entry {
/* Op1 = 0, CRn = 0, CRm = 7 */
ARM64_FTR_REG(SYS_ID_AA64MMFR0_EL1, ftr_id_aa64mmfr0),
- ARM64_FTR_REG(SYS_ID_AA64MMFR1_EL1, ftr_id_aa64mmfr1),
+ ARM64_FTR_REG_OVERRIDE(SYS_ID_AA64MMFR1_EL1, ftr_id_aa64mmfr1,
+ &id_aa64mmfr1_override),
ARM64_FTR_REG(SYS_ID_AA64MMFR2_EL1, ftr_id_aa64mmfr2),
/* Op1 = 0, CRn = 1, CRm = 2 */
diff --git a/arch/arm64/kernel/idreg-override.c b/arch/arm64/kernel/idreg-override.c
index 2d184d6674fd..489aa274e3ec 100644
--- a/arch/arm64/kernel/idreg-override.c
+++ b/arch/arm64/kernel/idreg-override.c
@@ -10,6 +10,7 @@
#include <linux/libfdt.h>
#include <asm/cacheflush.h>
+#include <asm/cpufeature.h>
#include <asm/setup.h>
struct ftr_set_desc {
@@ -21,7 +22,17 @@ struct ftr_set_desc {
} fields[];
};
+static const struct ftr_set_desc mmfr1 __initdata = {
+ .name = "id_aa64mmfr1",
+ .override = &id_aa64mmfr1_override,
+ .fields = {
+ { "vh", ID_AA64MMFR1_VHE_SHIFT },
+ {}
+ },
+};
+
static const struct ftr_set_desc * const regs[] __initdata = {
+ &mmfr1,
};
static char *cmdline_contains_option(const char *cmdline, const char *option)
--
2.29.2
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
next prev parent reply other threads:[~2021-01-25 10:53 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-25 10:49 [PATCH v5 00/21] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth Marc Zyngier
2021-01-25 10:49 ` [PATCH v5 01/21] arm64: Fix labels in el2_setup macros Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 02/21] arm64: Fix outdated TCR setup comment Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 03/21] arm64: Turn the MMU-on sequence into a macro Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 04/21] arm64: Provide an 'upgrade to VHE' stub hypercall Marc Zyngier
2021-01-25 12:13 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 05/21] arm64: Initialise as nVHE before switching to VHE Marc Zyngier
2021-01-25 12:13 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 06/21] arm64: Move VHE-specific SPE setup to mutate_to_vhe() Marc Zyngier
2021-01-25 12:14 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 07/21] arm64: Simplify init_el2_state to be non-VHE only Marc Zyngier
2021-01-25 12:14 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 08/21] arm64: Move SCTLR_EL1 initialisation to EL-agnostic code Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 09/21] arm64: cpufeature: Add global feature override facility Marc Zyngier
2021-01-25 12:15 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 10/21] arm64: cpufeature: Use IDreg override in __read_sysreg_by_encoding() Marc Zyngier
2021-01-25 12:19 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 11/21] arm64: Extract early FDT mapping from kaslr_early_init() Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 12/21] arm64: cpufeature: Add an early command-line cpufeature override facility Marc Zyngier
2021-01-25 18:37 ` Catalin Marinas
2021-01-25 10:50 ` Marc Zyngier [this message]
2021-01-25 13:15 ` [PATCH v5 13/21] arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line Suzuki K Poulose
2021-01-25 13:55 ` Marc Zyngier
2021-01-25 18:37 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 14/21] arm64: Honor VHE being disabled from the command-line Marc Zyngier
2021-01-25 18:38 ` Catalin Marinas
2021-01-25 10:50 ` [PATCH v5 15/21] arm64: Add an aliasing facility for the idreg override Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 16/21] arm64: Make kvm-arm.mode={nvhe, protected} an alias of id_aa64mmfr1.vh=0 Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 17/21] KVM: arm64: Document HVC_VHE_RESTART stub hypercall Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 18/21] arm64: Move "nokaslr" over to the early cpufeature infrastructure Marc Zyngier
2021-01-25 12:54 ` Ard Biesheuvel
2021-01-25 13:54 ` Marc Zyngier
2021-01-25 14:19 ` Ard Biesheuvel
2021-01-25 14:28 ` Marc Zyngier
2021-01-25 15:00 ` Ard Biesheuvel
2021-01-25 10:50 ` [PATCH v5 19/21] arm64: cpufeatures: Allow disabling of BTI from the command-line Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 20/21] arm64: Defer enabling pointer authentication on boot core Marc Zyngier
2021-01-25 10:50 ` [PATCH v5 21/21] arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210125105019.2946057-14-maz@kernel.org \
--to=maz@kernel.org \
--cc=ardb@kernel.org \
--cc=catalin.marinas@arm.com \
--cc=kernel-team@android.com \
--cc=kvmarm@lists.cs.columbia.edu \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=pajay@qti.qualcomm.com \
--cc=psodagud@codeaurora.org \
--cc=sramana@codeaurora.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).