From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org
Cc: Prasad Sodagudi <psodagud@codeaurora.org>,
Srinivas Ramana <sramana@codeaurora.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Hector Martin <marcan@marcan.st>,
Ajay Patil <pajay@qti.qualcomm.com>,
kernel-team@android.com, Will Deacon <will@kernel.org>,
Ard Biesheuvel <ardb@kernel.org>
Subject: [PATCH v7 23/23] [DO NOT MERGE] arm64: Cope with CPUs stuck in VHE mode
Date: Mon, 8 Feb 2021 09:57:32 +0000 [thread overview]
Message-ID: <20210208095732.3267263-24-maz@kernel.org> (raw)
In-Reply-To: <20210208095732.3267263-1-maz@kernel.org>
It seems that the CPU known as Apple M1 has the terrible habit
of being stuck with HCR_EL2.E2H==1, in violation of the architecture.
Try and work around this deplorable state of affairs by detecting
the stuck bit early and short-circuit the nVHE dance. It is still
unknown whether there are many more such nuggets to be found...
Reported-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Marc Zyngier <maz@kernel.org>
---
arch/arm64/kernel/head.S | 33 ++++++++++++++++++++++++++++++---
arch/arm64/kernel/hyp-stub.S | 28 ++++++++++++++++++++++++----
2 files changed, 54 insertions(+), 7 deletions(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 2e116ef255e1..bce66d6bda74 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -477,14 +477,13 @@ EXPORT_SYMBOL(kimage_vaddr)
* booted in EL1 or EL2 respectively.
*/
SYM_FUNC_START(init_kernel_el)
- mov_q x0, INIT_SCTLR_EL1_MMU_OFF
- msr sctlr_el1, x0
-
mrs x0, CurrentEL
cmp x0, #CurrentEL_EL2
b.eq init_el2
SYM_INNER_LABEL(init_el1, SYM_L_LOCAL)
+ mov_q x0, INIT_SCTLR_EL1_MMU_OFF
+ msr sctlr_el1, x0
isb
mov_q x0, INIT_PSTATE_EL1
msr spsr_el1, x0
@@ -504,6 +503,34 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL)
msr vbar_el2, x0
isb
+ /*
+ * Fruity CPUs seem to have HCR_EL2.E2H set to RES1,
+ * making it impossible to start in nVHE mode. Is that
+ * compliant with the architecture? Absolutely not!
+ */
+ mrs x0, hcr_el2
+ and x0, x0, #HCR_E2H
+ cbz x0, 1f
+
+ /* Switching to VHE requires a sane SCTLR_EL1 as a start */
+ mov_q x0, INIT_SCTLR_EL1_MMU_OFF
+ msr_s SYS_SCTLR_EL12, x0
+
+ /*
+ * Force an eret into a helper "function", and let it return
+ * to our original caller... This makes sure that we have
+ * initialised the basic PSTATE state.
+ */
+ mov x0, #INIT_PSTATE_EL2
+ msr spsr_el1, x0
+ adr_l x0, stick_to_vhe
+ msr elr_el1, x0
+ eret
+
+1:
+ mov_q x0, INIT_SCTLR_EL1_MMU_OFF
+ msr sctlr_el1, x0
+
msr elr_el2, lr
mov w0, #BOOT_CPU_MODE_EL2
eret
diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S
index 3e08dcc924b5..b55ed4af4c4a 100644
--- a/arch/arm64/kernel/hyp-stub.S
+++ b/arch/arm64/kernel/hyp-stub.S
@@ -27,12 +27,12 @@ SYM_CODE_START(__hyp_stub_vectors)
ventry el2_fiq_invalid // FIQ EL2t
ventry el2_error_invalid // Error EL2t
- ventry el2_sync_invalid // Synchronous EL2h
+ ventry elx_sync // Synchronous EL2h
ventry el2_irq_invalid // IRQ EL2h
ventry el2_fiq_invalid // FIQ EL2h
ventry el2_error_invalid // Error EL2h
- ventry el1_sync // Synchronous 64-bit EL1
+ ventry elx_sync // Synchronous 64-bit EL1
ventry el1_irq_invalid // IRQ 64-bit EL1
ventry el1_fiq_invalid // FIQ 64-bit EL1
ventry el1_error_invalid // Error 64-bit EL1
@@ -45,7 +45,7 @@ SYM_CODE_END(__hyp_stub_vectors)
.align 11
-SYM_CODE_START_LOCAL(el1_sync)
+SYM_CODE_START_LOCAL(elx_sync)
cmp x0, #HVC_SET_VECTORS
b.ne 1f
msr vbar_el2, x1
@@ -71,7 +71,7 @@ SYM_CODE_START_LOCAL(el1_sync)
9: mov x0, xzr
eret
-SYM_CODE_END(el1_sync)
+SYM_CODE_END(elx_sync)
// nVHE? No way! Give me the real thing!
SYM_CODE_START_LOCAL(mutate_to_vhe)
@@ -227,3 +227,23 @@ SYM_FUNC_START(switch_to_vhe)
#endif
ret
SYM_FUNC_END(switch_to_vhe)
+
+SYM_FUNC_START(stick_to_vhe)
+ /*
+ * Make sure the switch to VHE cannot fail, by overriding the
+ * override. This is hilarious.
+ */
+ adr_l x1, id_aa64mmfr1_override
+ add x1, x1, #FTR_OVR_MASK_OFFSET
+ dc civac, x1
+ dsb sy
+ isb
+ ldr x0, [x1]
+ bic x0, x0, #(0xf << ID_AA64MMFR1_VHE_SHIFT)
+ str x0, [x1]
+
+ mov x0, #HVC_VHE_RESTART
+ hvc #0
+ mov x0, #BOOT_CPU_MODE_EL2
+ ret
+SYM_FUNC_END(stick_to_vhe)
--
2.29.2
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next prev parent reply other threads:[~2021-02-08 10:04 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-08 9:57 [PATCH v7 00/23] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 01/23] arm64: Fix labels in el2_setup macros Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 02/23] arm64: Fix outdated TCR setup comment Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 03/23] arm64: Turn the MMU-on sequence into a macro Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 04/23] arm64: Provide an 'upgrade to VHE' stub hypercall Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 05/23] arm64: Initialise as nVHE before switching to VHE Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 06/23] arm64: Drop early setting of MDSCR_EL2.TPMS Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 07/23] arm64: Move VHE-specific SPE setup to mutate_to_vhe() Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 08/23] arm64: Simplify init_el2_state to be non-VHE only Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 09/23] arm64: Move SCTLR_EL1 initialisation to EL-agnostic code Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 10/23] arm64: cpufeature: Add global feature override facility Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 11/23] arm64: cpufeature: Use IDreg override in __read_sysreg_by_encoding() Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 12/23] arm64: Extract early FDT mapping from kaslr_early_init() Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 13/23] arm64: cpufeature: Add an early command-line cpufeature override facility Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 14/23] arm64: Allow ID_AA64MMFR1_EL1.VH to be overridden from the command line Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 15/23] arm64: Honor VHE being disabled from the command-line Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 16/23] arm64: Add an aliasing facility for the idreg override Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 17/23] arm64: Make kvm-arm.mode={nvhe, protected} an alias of id_aa64mmfr1.vh=0 Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 18/23] KVM: arm64: Document HVC_VHE_RESTART stub hypercall Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 19/23] arm64: Move "nokaslr" over to the early cpufeature infrastructure Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 20/23] arm64: cpufeatures: Allow disabling of BTI from the command-line Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 21/23] arm64: Defer enabling pointer authentication on boot core Marc Zyngier
2021-02-08 9:57 ` [PATCH v7 22/23] arm64: cpufeatures: Allow disabling of Pointer Auth from the command-line Marc Zyngier
2021-02-08 9:57 ` Marc Zyngier [this message]
2021-02-22 9:35 ` [PATCH v7 23/23] [DO NOT MERGE] arm64: Cope with CPUs stuck in VHE mode Jonathan Neuschäfer
2021-02-22 9:47 ` Marc Zyngier
2021-02-08 14:32 ` [PATCH v7 00/23] arm64: Early CPU feature override, and applications to VHE, BTI and PAuth Will Deacon
2021-02-08 14:40 ` Ard Biesheuvel
2021-02-08 15:02 ` Marc Zyngier
2021-02-08 16:30 ` Marc Zyngier
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