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From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, kvm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Cc: James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Oliver Upton <oliver.upton@linux.dev>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Ricardo Koller <ricarkol@google.com>,
	Simon Veith <sveith@amazon.de>,
	Reiji Watanabe <reijiw@google.com>,
	Colton Lewis <coltonlewis@google.com>,
	Joey Gouly <joey.gouly@arm.com>,
	dwmw2@infradead.org
Subject: [PATCH v2 19/19] KVM: arm64: selftests: Deal with spurious timer interrupts
Date: Mon, 13 Mar 2023 12:48:37 +0000	[thread overview]
Message-ID: <20230313124837.2264882-20-maz@kernel.org> (raw)
In-Reply-To: <20230313124837.2264882-1-maz@kernel.org>

Make sure the timer test can properly handle a spurious timer
interrupt, something that is far from being unlikely.

This involves checking for the GIC IAR return value (don't bother
handling the interrupt if it was spurious) as well as the timer
control register (don't do anything if the interrupt is masked
or the timer disabled). Take this opportunity to rewrite the
timer handler in a more readable way.

This solves a bunch of failures that creep up on systems that
are slow to retire the interrupt, something that the GIC architecture
makes no guarantee about.

Signed-off-by: Marc Zyngier <maz@kernel.org>
---
 .../selftests/kvm/aarch64/arch_timer.c        | 40 ++++++++++++-------
 1 file changed, 25 insertions(+), 15 deletions(-)

diff --git a/tools/testing/selftests/kvm/aarch64/arch_timer.c b/tools/testing/selftests/kvm/aarch64/arch_timer.c
index 6d2e811fbf85..ed88580c0a99 100644
--- a/tools/testing/selftests/kvm/aarch64/arch_timer.c
+++ b/tools/testing/selftests/kvm/aarch64/arch_timer.c
@@ -123,25 +123,35 @@ static void guest_validate_irq(unsigned int intid,
 	uint64_t xcnt = 0, xcnt_diff_us, cval = 0;
 	unsigned long xctl = 0;
 	unsigned int timer_irq = 0;
+	unsigned int accessor;
 
-	if (stage == GUEST_STAGE_VTIMER_CVAL ||
-		stage == GUEST_STAGE_VTIMER_TVAL) {
-		xctl = timer_get_ctl(VIRTUAL);
-		timer_set_ctl(VIRTUAL, CTL_IMASK);
-		xcnt = timer_get_cntct(VIRTUAL);
-		cval = timer_get_cval(VIRTUAL);
+	if (intid == IAR_SPURIOUS)
+		return;
+
+	switch (stage) {
+	case GUEST_STAGE_VTIMER_CVAL:
+	case GUEST_STAGE_VTIMER_TVAL:
+		accessor = VIRTUAL;
 		timer_irq = vtimer_irq;
-	} else if (stage == GUEST_STAGE_PTIMER_CVAL ||
-		stage == GUEST_STAGE_PTIMER_TVAL) {
-		xctl = timer_get_ctl(PHYSICAL);
-		timer_set_ctl(PHYSICAL, CTL_IMASK);
-		xcnt = timer_get_cntct(PHYSICAL);
-		cval = timer_get_cval(PHYSICAL);
+		break;
+	case GUEST_STAGE_PTIMER_CVAL:
+	case GUEST_STAGE_PTIMER_TVAL:
+		accessor = PHYSICAL;
 		timer_irq = ptimer_irq;
-	} else {
+		break;
+	default:
 		GUEST_ASSERT(0);
+		return;
 	}
 
+	xctl = timer_get_ctl(accessor);
+	if ((xctl & CTL_IMASK) || !(xctl & CTL_ENABLE))
+		return;
+
+	timer_set_ctl(accessor, CTL_IMASK);
+	xcnt = timer_get_cntct(accessor);
+	cval = timer_get_cval(accessor);
+
 	xcnt_diff_us = cycles_to_usec(xcnt - shared_data->xcnt);
 
 	/* Make sure we are dealing with the correct timer IRQ */
@@ -150,6 +160,8 @@ static void guest_validate_irq(unsigned int intid,
 	/* Basic 'timer condition met' check */
 	GUEST_ASSERT_3(xcnt >= cval, xcnt, cval, xcnt_diff_us);
 	GUEST_ASSERT_1(xctl & CTL_ISTATUS, xctl);
+
+	WRITE_ONCE(shared_data->nr_iter, shared_data->nr_iter + 1);
 }
 
 static void guest_irq_handler(struct ex_regs *regs)
@@ -160,8 +172,6 @@ static void guest_irq_handler(struct ex_regs *regs)
 
 	guest_validate_irq(intid, shared_data);
 
-	WRITE_ONCE(shared_data->nr_iter, shared_data->nr_iter + 1);
-
 	gic_set_eoi(intid);
 }
 
-- 
2.34.1


  parent reply	other threads:[~2023-03-13 13:10 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-13 12:48 [PATCH v2 00/19] KVM: arm64: Rework timer offsetting for fun and profit Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 01/19] KVM: arm64: timers: Convert per-vcpu virtual offset to a global value Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 02/19] KVM: arm64: timers: Use a per-vcpu, per-timer accumulator for fractional ns Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 03/19] arm64: Add CNTPOFF_EL2 register definition Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 04/19] arm64: Add HAS_ECV_CNTPOFF capability Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 05/19] KVM: arm64: timers: Use CNTPOFF_EL2 to offset the physical timer Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 06/19] KVM: arm64: timers: Allow physical offset without CNTPOFF_EL2 Marc Zyngier
2023-03-13 16:43   ` Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 07/19] KVM: arm64: Expose {un,}lock_all_vcpus() to the reset of KVM Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 08/19] KVM: arm64: timers: Allow userspace to set the global counter offset Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 09/19] KVM: arm64: timers: Allow save/restoring of the physical timer Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 10/19] KVM: arm64: timers: Rationalise per-vcpu timer init Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 11/19] KVM: arm64: timers: Abstract per-timer IRQ access Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 12/19] KVM: arm64: timers: Move the timer IRQs into arch_timer_vm_data Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 13/19] KVM: arm64: Abstract the number of valid timers per vcpu Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 14/19] KVM: arm64: Document KVM_ARM_SET_CNT_OFFSETS and co Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 15/19] KVM: arm64: nv: timers: Add a per-timer, per-vcpu offset Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 16/19] KVM: arm64: nv: timers: Support hyp timer emulation Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 17/19] KVM: arm64: selftests: Add physical timer registers to the sysreg list Marc Zyngier
2023-03-13 12:48 ` [PATCH v2 18/19] KVM: arm64: selftests: Augment existing timer test to handle variable offset Marc Zyngier
2023-03-13 12:48 ` Marc Zyngier [this message]
2023-03-23 22:19 ` [PATCH v2 00/19] KVM: arm64: Rework timer offsetting for fun and profit Colton Lewis
2023-03-23 22:54   ` Marc Zyngier

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