From: Oliver Upton <oliver.upton@linux.dev>
To: kvmarm@lists.linux.dev
Cc: kvm@vger.kernel.org, Marc Zyngier <maz@kernel.org>,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Zenghui Yu <yuzenghui@huawei.com>,
linux-kernel@vger.kernel.org,
Oliver Upton <oliver.upton@linux.dev>
Subject: [PATCH v2 13/23] KVM: arm64: vgic-its: Pick cache victim based on usage count
Date: Tue, 13 Feb 2024 09:32:50 +0000 [thread overview]
Message-ID: <20240213093250.3960069-14-oliver.upton@linux.dev> (raw)
In-Reply-To: <20240213093250.3960069-1-oliver.upton@linux.dev>
To date the translation cache LRU policy relies on the ordering of the
linked-list to pick the victim, as entries are moved to the head of the
list on every cache hit. These sort of transformations are incompatible
with an rculist, necessitating a different strategy for recording usage
in-place.
Count the number of cache hits since the last translation cache miss for
every entry. The preferences for selecting a victim are as follows:
- Invalid entries over valid entries
- Valid entry with the lowest usage count
- In the case of a tie, pick the entry closest to the tail (oldest)
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
---
arch/arm64/kvm/vgic/vgic-its.c | 46 ++++++++++++++++++++++++++--------
1 file changed, 36 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/kvm/vgic/vgic-its.c b/arch/arm64/kvm/vgic/vgic-its.c
index a7ba20b57264..35926d5ae561 100644
--- a/arch/arm64/kvm/vgic/vgic-its.c
+++ b/arch/arm64/kvm/vgic/vgic-its.c
@@ -157,6 +157,7 @@ struct vgic_translation_cache_entry {
u32 devid;
u32 eventid;
struct vgic_irq *irq;
+ atomic64_t usage_count;
};
/**
@@ -580,13 +581,7 @@ static struct vgic_irq *__vgic_its_check_cache(struct vgic_dist *dist,
cte->eventid != eventid)
continue;
- /*
- * Move this entry to the head, as it is the most
- * recently used.
- */
- if (!list_is_first(&cte->entry, &dist->lpi_translation_cache))
- list_move(&cte->entry, &dist->lpi_translation_cache);
-
+ atomic64_inc(&cte->usage_count);
return cte->irq;
}
@@ -619,6 +614,36 @@ static unsigned int vgic_its_max_cache_size(struct kvm *kvm)
return atomic_read(&kvm->online_vcpus) * LPI_DEFAULT_PCPU_CACHE_SIZE;
}
+static struct vgic_translation_cache_entry *vgic_its_cache_victim(struct vgic_dist *dist,
+ s64 *max_usage)
+{
+ struct vgic_translation_cache_entry *cte, *victim = NULL;
+ s64 min, tmp, max = S64_MIN;
+
+ /*
+ * Find the least used cache entry since the last cache miss, preferring
+ * older entries in the case of a tie. Return the max usage count seen
+ * during the scan to initialize the new cache entry.
+ */
+ list_for_each_entry(cte, &dist->lpi_translation_cache, entry) {
+ tmp = atomic64_read(&cte->usage_count);
+ max = max(max, tmp);
+
+ if (!cte->irq) {
+ victim = cte;
+ break;
+ }
+
+ if (!victim || tmp <= min) {
+ victim = cte;
+ min = tmp;
+ }
+ }
+
+ *max_usage = max;
+ return victim;
+}
+
static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its,
u32 devid, u32 eventid,
struct vgic_irq *irq)
@@ -627,6 +652,7 @@ static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its,
struct vgic_dist *dist = &kvm->arch.vgic;
unsigned long flags;
phys_addr_t db;
+ s64 usage = 0;
/* Do not cache a directly injected interrupt */
if (irq->hw)
@@ -650,9 +676,8 @@ static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its,
}
if (dist->lpi_cache_count >= vgic_its_max_cache_size(kvm)) {
- /* Always reuse the last entry (LRU policy) */
- victim = list_last_entry(&dist->lpi_translation_cache,
- typeof(*cte), entry);
+ victim = vgic_its_cache_victim(dist, &usage);
+
list_del(&victim->entry);
dist->lpi_cache_count--;
}
@@ -664,6 +689,7 @@ static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its,
lockdep_assert_held(&its->its_lock);
vgic_get_irq_kref(irq);
+ atomic64_set(&new->usage_count, usage);
new->db = db;
new->devid = devid;
new->eventid = eventid;
--
2.43.0.687.g38aa6559b0-goog
next prev parent reply other threads:[~2024-02-13 9:33 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-02-13 9:32 [PATCH v2 00/23] KVM: arm64: Improvements to LPI injection Oliver Upton
2024-02-13 9:32 ` [PATCH v2 01/23] KVM: arm64: Add tracepoints + stats for LPI cache effectiveness Oliver Upton
2024-02-14 15:55 ` Marc Zyngier
2024-02-13 9:32 ` [PATCH v2 02/23] KVM: arm64: vgic: Store LPIs in an xarray Oliver Upton
2024-02-13 21:52 ` Oliver Upton
2024-02-13 9:32 ` [PATCH v2 03/23] KVM: arm64: vgic: Use xarray to find LPI in vgic_get_lpi() Oliver Upton
2024-02-13 9:32 ` [PATCH v2 04/23] KVM: arm64: vgic-v3: Iterate the xarray to find pending LPIs Oliver Upton
2024-02-13 9:32 ` [PATCH v2 05/23] KVM: arm64: vgic-its: Walk the LPI xarray in vgic_copy_lpi_list() Oliver Upton
2024-02-13 9:32 ` [PATCH v2 06/23] KVM: arm64: vgic: Get rid of the LPI linked-list Oliver Upton
2024-02-13 9:32 ` [PATCH v2 07/23] KVM: arm64: vgic: Use atomics to count LPIs Oliver Upton
2024-02-14 16:47 ` Marc Zyngier
2024-02-14 18:32 ` Oliver Upton
2024-02-14 20:01 ` Marc Zyngier
2024-02-14 23:01 ` Oliver Upton
2024-02-15 9:44 ` Marc Zyngier
2024-02-13 9:32 ` [PATCH v2 08/23] KVM: arm64: vgic: Free LPI vgic_irq structs in an RCU-safe manner Oliver Upton
2024-02-13 9:32 ` [PATCH v2 09/23] KVM: arm64: vgic: Rely on RCU protection in vgic_get_lpi() Oliver Upton
2024-02-13 9:32 ` [PATCH v2 10/23] KVM: arm64: vgic: Ensure the irq refcount is nonzero when taking a ref Oliver Upton
2024-02-13 9:32 ` [PATCH v2 11/23] KVM: arm64: vgic: Don't acquire the lpi_list_lock in vgic_put_irq() Oliver Upton
2024-02-13 9:32 ` [PATCH v2 12/23] KVM: arm64: vgic-its: Lazily allocate LPI translation cache Oliver Upton
2024-02-13 9:32 ` Oliver Upton [this message]
2024-02-13 9:37 ` [PATCH v2 14/23] KVM: arm64: vgic-its: Protect cached vgic_irq pointers with RCU Oliver Upton
2024-02-13 9:39 ` [PATCH v2 15/23] KVM: arm64: vgic-its: Treat the LPI translation cache as an rculist Oliver Upton
2024-02-13 9:40 ` [PATCH v2 16/23] KVM: arm64: vgic-its: Rely on RCU to protect translation cache reads Oliver Upton
2024-02-13 9:40 ` [PATCH v2 17/23] KVM: selftests: Align with kernel's GIC definitions Oliver Upton
2024-02-13 9:40 ` [PATCH v2 18/23] KVM: selftests: Standardise layout of GIC frames Oliver Upton
2024-02-13 9:41 ` [PATCH v2 19/23] KVM: selftests: Add a minimal library for interacting with an ITS Oliver Upton
2024-02-14 17:32 ` Marc Zyngier
2024-02-14 19:00 ` Oliver Upton
2024-02-14 20:09 ` Marc Zyngier
2024-02-14 20:55 ` Oliver Upton
2024-02-14 21:06 ` Oliver Upton
2024-02-13 9:41 ` [PATCH v2 20/23] KVM: selftests: Add helper for enabling LPIs on a redistributor Oliver Upton
2024-02-13 9:42 ` [PATCH v2 21/23] KVM: selftests: Use MPIDR_HWID_BITMASK from cputype.h Oliver Upton
2024-02-13 9:43 ` [PATCH v2 22/23] KVM: selftests: Hack in support for aligned page allocations Oliver Upton
2024-02-13 9:43 ` [PATCH v2 23/23] KVM: selftests: Add stress test for LPI injection Oliver Upton
2024-02-13 20:12 ` [PATCH v2 00/23] KVM: arm64: Improvements to " Oliver Upton
2024-02-14 17:43 ` Marc Zyngier
2024-02-14 18:40 ` Oliver Upton
2024-02-15 15:37 ` Marc Zyngier
2024-02-15 20:15 ` Oliver Upton
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240213093250.3960069-14-oliver.upton@linux.dev \
--to=oliver.upton@linux.dev \
--cc=james.morse@arm.com \
--cc=kvm@vger.kernel.org \
--cc=kvmarm@lists.linux.dev \
--cc=linux-kernel@vger.kernel.org \
--cc=maz@kernel.org \
--cc=suzuki.poulose@arm.com \
--cc=yuzenghui@huawei.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).