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Tue, 21 May 2019 09:15:26 -0700 (PDT) Received: from [10.1.196.93] (en101.cambridge.arm.com [10.1.196.93]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2F8613F718; Tue, 21 May 2019 09:15:25 -0700 (PDT) Subject: Re: [PATCH v7 4/5] arm64: perf: extract chain helper into header To: andrew.murray@arm.com, christoffer.dall@arm.com, marc.zyngier@arm.com References: <20190521155228.903-1-andrew.murray@arm.com> <20190521155228.903-5-andrew.murray@arm.com> From: Suzuki K Poulose Message-ID: <3061cf77-840e-4197-afc3-ff91a33a9cdf@arm.com> Date: Tue, 21 May 2019 17:15:23 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <20190521155228.903-5-andrew.murray@arm.com> Content-Language: en-US Cc: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On 21/05/2019 16:52, Andrew Murray wrote: > The ARMv8 Performance Monitors Extension includes an architectural > event type named CHAIN which allows for chaining counters together. > > Let's extract the test for this event into a header file such that > other users, such as KVM (for PMU emulation) can make use of. > > Signed-off-by: Andrew Murray > --- > arch/arm64/include/asm/perf_event.h | 5 +++++ > arch/arm64/kernel/perf_event.c | 2 +- > 2 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/include/asm/perf_event.h b/arch/arm64/include/asm/perf_event.h > index c593761ba61c..cd13f3fd1055 100644 > --- a/arch/arm64/include/asm/perf_event.h > +++ b/arch/arm64/include/asm/perf_event.h > @@ -219,6 +219,11 @@ > #define ARMV8_PMU_USERENR_CR (1 << 2) /* Cycle counter can be read at EL0 */ > #define ARMV8_PMU_USERENR_ER (1 << 3) /* Event counter can be read at EL0 */ > > +static inline bool armv8pmu_evtype_is_chain(u64 evtype) > +{ > + return (evtype == ARMV8_PMUV3_PERFCTR_CHAIN); > +} > + > #ifdef CONFIG_PERF_EVENTS > struct pt_regs; > extern unsigned long perf_instruction_pointer(struct pt_regs *regs); > diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c > index 314b1adedf06..265bd835a724 100644 > --- a/arch/arm64/kernel/perf_event.c > +++ b/arch/arm64/kernel/perf_event.c > @@ -879,7 +879,7 @@ static int armv8pmu_set_event_filter(struct hw_perf_event *event, > static int armv8pmu_filter_match(struct perf_event *event) > { > unsigned long evtype = event->hw.config_base & ARMV8_PMU_EVTYPE_EVENT; > - return evtype != ARMV8_PMUV3_PERFCTR_CHAIN; > + return !armv8pmu_evtype_is_chain(evtype); > } > > static void armv8pmu_reset(void *info) > Reviewed-by: Suzuki K Poulose _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm