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Mon, 18 May 2020 04:18:24 -0700 (PDT) Received: from [192.168.178.58] ([151.30.90.67]) by smtp.gmail.com with ESMTPSA id r2sm16417514wrg.84.2020.05.18.04.18.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 18 May 2020 04:18:24 -0700 (PDT) Subject: Re: [PATCH 0/2] Expose KVM API to Linux Kernel To: Anastassios Nanos , Marc Zyngier References: From: Paolo Bonzini Message-ID: <760e0927-d3a7-a8c6-b769-55f43a65e095@redhat.com> Date: Mon, 18 May 2020 13:18:23 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.6.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Cc: Thomas Gleixner , Wanpeng Li , kvm@vger.kernel.org, Catalin Marinas , Joerg Roedel , x86@kernel.org, linux-kernel@vger.kernel.org, Sean Christopherson , Ingo Molnar , "H. Peter Anvin" , Borislav Petkov , Vitaly Kuznetsov , Will Deacon , kvmarm@lists.cs.columbia.edu, Jim Mattson X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On 18/05/20 10:45, Anastassios Nanos wrote: > Being in the kernel saves us from doing unneccessary mode switches. > Of course there are optimizations for handling I/O on QEMU/KVM VMs > (virtio/vhost), but essentially what happens is removing mode-switches (and > exits) for I/O operations -- is there a good reason not to address that > directly? a guest running in the kernel exits because of an I/O request, > which gets processed and forwarded directly to the relevant subsystem *in* > the kernel (net/block etc.). In high-performance configurations, most of the time virtio devices are processed in another thread that polls on the virtio rings. In this setup, the rings are configured to not cause a vmexit at all; this has much smaller latency than even a lightweight (kernel-only) vmexit, basically corresponding to writing an L1 cache line back to L2. Paolo _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm