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bh=rIEdh/DAd6NbjanhhI+rIjqTmDzgvXvSY5PTF8Wyo3o=; b=l/NBNOEQbJx1SuO8Sh5Ieq+l1nbTwhd7wm9DskYo6HEvLAv3Vg60QTA8/NCBcgF34l te++U7zOEp1ZL+DId/VUxmq9aKhwJzEB06ZAKUfhaQyPZnL9U1SIpeG56LGqSGMd8f6H bN+PPR5E1rjlXw/qMv/Q1q3nSU4oFX+2KvSHL7HLEsdbkhIFwAkW/lz1bkkC3S6YtP0p eqgCzQSK6Q4x7HmkgvDCPdqNTEqSUMH/sPMJx8+CnVYJIDJqtd7PAGmLvdbOvyl3NsFC +jfahhTYprVjlWSXSky11Vh9yagjHj7Efwqj/cJLjDXxKbndXtIYC2u+W/wpv47vo6oZ NzSw== X-Gm-Message-State: AGi0Puadqf5Um5tVz0Q069W6/l/qBGeKTqgCCdFAr23N5dNIH7vPMZup yn71U5YsKWWGzK+ix1X0oNQut0cFOglAqUWBbkdpUg== X-Google-Smtp-Source: APiQypJPlhe8viCt0w4M7jWn3ZDa4o/oya5uNTT3+JGHSdRBcX/AGaeIsaF/W/ZTMy00nFgZcix4QfOw5EHSnMHpoYU= X-Received: by 2002:a02:2944:: with SMTP id p65mr1423350jap.89.1586259080137; Tue, 07 Apr 2020 04:31:20 -0700 (PDT) MIME-Version: 1.0 References: <20200323113227.3169-1-beata.michalska@linaro.org> <20200323113227.3169-3-beata.michalska@linaro.org> <20200403084435.zvfewiivn7orsnll@kamzik.brq.redhat.com> In-Reply-To: <20200403084435.zvfewiivn7orsnll@kamzik.brq.redhat.com> From: Beata Michalska Date: Tue, 7 Apr 2020 12:31:09 +0100 Message-ID: Subject: Re: [PATCH v4 2/2] target/arm: kvm: Handle potential issue with dabt injection To: Andrew Jones Cc: QEMU Developers , qemu-arm , Paolo Bonzini , kvmarm@lists.cs.columbia.edu X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: multipart/mixed; boundary="===============1446791611208538366==" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu --===============1446791611208538366== Content-Type: multipart/alternative; boundary="000000000000fe667305a2b1b8c6" --000000000000fe667305a2b1b8c6 Content-Type: text/plain; charset="UTF-8" On Fri, 3 Apr 2020 at 09:44, Andrew Jones wrote: > > On Mon, Mar 23, 2020 at 11:32:27AM +0000, Beata Michalska wrote: > > Injecting external data abort through KVM might trigger > > an issue on kernels that do not get updated to include the KVM fix. > > For those and aarch32 guests, the injected abort gets misconfigured > > to be an implementation defined exception. This leads to the guest > > repeatedly re-running the faulting instruction. > > > > Add support for handling that case. > > [ > > Fixed-by: 018f22f95e8a > > ('KVM: arm: Fix DFSR setting for non-LPAE aarch32 guests') > > Fixed-by: 21aecdbd7f3a > > ('KVM: arm: Make inject_abt32() inject an external abort instead') > > ] > > > > Signed-off-by: Beata Michalska > > --- > > target/arm/cpu.h | 1 + > > target/arm/kvm.c | 30 +++++++++++++++++++++++++++++- > > target/arm/kvm32.c | 25 +++++++++++++++++++++++++ > > target/arm/kvm64.c | 34 ++++++++++++++++++++++++++++++++++ > > target/arm/kvm_arm.h | 10 ++++++++++ > > 5 files changed, 99 insertions(+), 1 deletion(-) > > > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > > index 4f834c1..868afc6 100644 > > --- a/target/arm/cpu.h > > +++ b/target/arm/cpu.h > > @@ -561,6 +561,7 @@ typedef struct CPUARMState { > > } serror; > > > > uint8_t ext_dabt_pending; /* Request for injecting ext DABT */ > > + uint8_t ext_dabt_raised; /* Tracking/verifying injection of ext DABT */ > > > > /* State of our input IRQ/FIQ/VIRQ/VFIQ lines */ > > uint32_t irq_line_state; > > diff --git a/target/arm/kvm.c b/target/arm/kvm.c > > index c088589..58ad734 100644 > > --- a/target/arm/kvm.c > > +++ b/target/arm/kvm.c > > @@ -721,7 +721,12 @@ int kvm_put_vcpu_events(ARMCPU *cpu) > > ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events); > > if (ret) { > > error_report("failed to put vcpu events"); > > - } else { > > + } else if (env->ext_dabt_pending) { > > + /* > > + * Mark that the external DABT has been injected, > > + * if one has been requested > > + */ > > + env->ext_dabt_raised = env->ext_dabt_pending; > > /* Clear instantly if the call was successful */ > > env->ext_dabt_pending = 0; > > } > > @@ -755,6 +760,29 @@ int kvm_get_vcpu_events(ARMCPU *cpu) > > > > void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) > > { > > + ARMCPU *cpu = ARM_CPU(cs); > > + CPUARMState *env = &cpu->env; > > + > > + if (unlikely(env->ext_dabt_raised)) { > > + /* > > + * Verifying that the ext DABT has been properly injected, > > + * otherwise risking indefinitely re-running the faulting instruction > > + * Covering a very narrow case for kernels 5.5..5.5.4 > > + * when injected abort was misconfigured to be > > + * an IMPLEMENTATION DEFINED exception (for 32-bit EL1) > > + */ > > + if (!arm_feature(env, ARM_FEATURE_AARCH64) && > > + unlikely(!kvm_arm_verify_ext_dabt_pending(cs))) { > > + > > + error_report("Data abort exception with no valid ISS generated by " > > + "guest memory access. KVM unable to emulate faulting " > > + "instruction. Failed to inject an external data abort " > > + "into the guest."); > > + abort(); > > + } > > + /* Clear the status */ > > + env->ext_dabt_raised = 0; > > + } > > } > > > > MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run) > > diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c > > index f271181..86c4fe7 100644 > > --- a/target/arm/kvm32.c > > +++ b/target/arm/kvm32.c > > @@ -564,3 +564,28 @@ void kvm_arm_pmu_init(CPUState *cs) > > { > > qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__); > > } > > + > > +#define ARM_REG_DFSR ARM_CP15_REG32(0, 5, 0, 0) > > +#define ARM_REG_TTBCR ARM_CP15_REG32(0, 2, 0, 2) > > + > > +#define DFSR_FSC(v) (((v) >> 6 | (v)) & 0x1F) > > +#define DFSC_EXTABT(lpae) (lpae) ? 0x10 : 0x08 > > We should put () around the whole ?: expression when it's in a macro > > > + > > +bool kvm_arm_verify_ext_dabt_pending(CPUState *cs) > > +{ > > + uint32_t dfsr_val; > > + > > + if (!kvm_get_one_reg(cs, ARM_REG_DFSR, &dfsr_val)) { > > + ARMCPU *cpu = ARM_CPU(cs); > > + CPUARMState *env = &cpu->env; > > + uint32_t ttbcr; > > + int lpae = 0; > > + > > + if (!kvm_get_one_reg(cs, ARM_REG_TTBCR, &ttbcr)) { > > + lpae = arm_feature(env, ARM_FEATURE_LPAE) && (ttbcr & TTBCR_EAE); > > + } > > + return !(DFSR_FSC(dfsr_val) != DFSC_EXTABT(lpae)); > > !(a != b) is a convoluted way to write a == b > > > + } > > + return false; > > +} > > + > > diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c > > index be5b31c..18594e9 100644 > > --- a/target/arm/kvm64.c > > +++ b/target/arm/kvm64.c > > @@ -1430,3 +1430,37 @@ bool kvm_arm_handle_debug(CPUState *cs, struct kvm_debug_exit_arch *debug_exit) > > > > return false; > > } > > + > > +#define ARM64_REG_ESR_EL1 ARM64_SYS_REG(3, 0, 5, 2, 0) > > +#define ARM64_REG_TCR_EL1 ARM64_SYS_REG(3, 0, 2, 0, 2) > > + > > +#define ESR_DFSC(aarch64, v) \ > > + ((aarch64) ? ((v) & 0x3F) \ > > + : (((v) >> 6 | (v)) & 0x1F)) > > + > > +#define ESR_DFSC_EXTABT(aarch64, lpae) \ > > + ((aarch64) ? 0x10 : (lpae) ? 0x10 : 0x8) > > + > > +bool kvm_arm_verify_ext_dabt_pending(CPUState *cs) > > +{ > > + uint64_t dfsr_val; > > + > > + if (!kvm_get_one_reg(cs, ARM64_REG_ESR_EL1, &dfsr_val)) { > > + ARMCPU *cpu = ARM_CPU(cs); > > + CPUARMState *env = &cpu->env; > > + int aarch64_mode = arm_feature(env, ARM_FEATURE_AARCH64); > > + int lpae = 0; > > + > > + if (!aarch64_mode) { > > + uint64_t ttbcr; > > + > > + if (!kvm_get_one_reg(cs, ARM64_REG_TCR_EL1, &ttbcr)) { > > + lpae = arm_feature(env, ARM_FEATURE_LPAE) > > + && (ttbcr & TTBCR_EAE); > > + } > > + } > > + return !(ESR_DFSC(aarch64_mode, dfsr_val) != > > + ESR_DFSC_EXTABT(aarch64_mode, lpae)); > > a == b, please > > > + } > > + return false; > > +} > > diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h > > index 39472d5..f2dc6a2 100644 > > --- a/target/arm/kvm_arm.h > > +++ b/target/arm/kvm_arm.h > > @@ -461,6 +461,16 @@ void kvm_arm_copy_hw_debug_data(struct kvm_guest_debug_arch *ptr); > > int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss, > > uint64_t fault_ipa); > > /** > > + * kvm_arm_verify_ext_dabt_pending: > > + * @cs: CPUState > > + * > > + * Verify the fault status code wrt the Ext DABT injection > > + * > > + * Returns: true if the fault status code is as expected, false otherwise > > + */ > > +bool kvm_arm_verify_ext_dabt_pending(CPUState *cs); > > + > > +/** > > * its_class_name: > > * > > * Return the ITS class name to use depending on whether KVM acceleration > > -- > > 2.7.4 > > > > > > I'll leave the decision to take this KVM bug workaround patch at all to Peter, > and I didn't actually review whether or not kvm_arm_verify_ext_dabt_pending > is doing what it claims it's doing, so I'm reluctant to give an r-b on > this patch. But, as far as the code goes, besides the comments above, it > looks fine to me. > Thanks for the feedback. Will apply the changes for the next version. BR Beata > Thanks, > drew > --000000000000fe667305a2b1b8c6 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


On Fri, 3 Apr 2020 at 09:44, Andrew Jones <drjones@redhat.com> wrote:
>
> On Mon, Mar 23, 2020 at 11:32:27AM +0000, Beata Michalska wrote:
> > Injecting external data abort through KVM might trigger
> > an issue on kernels that do not get updated to include the KVM fi= x.
> > For those and aarch32 guests, the injected abort gets misconfigur= ed
> > to be an implementation defined exception. This leads to the gues= t
> > repeatedly re-running the faulting instruction.
> >
> > Add support for handling that case.
> > [
> >=C2=A0 =C2=A0Fixed-by: 018f22f95e8a
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0('KVM: arm: Fix DFSR setting for no= n-LPAE aarch32 guests')
> >=C2=A0 =C2=A0Fixed-by: 21aecdbd7f3a
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0('KVM: arm: Make inject_abt32() inj= ect an external abort instead')
> > ]
> >
> > Signed-off-by: Beata Michalska <beata.michalska@linaro.org>
> > ---
> >=C2=A0 target/arm/cpu.h=C2=A0 =C2=A0 =C2=A0|=C2=A0 1 +
> >=C2=A0 target/arm/kvm.c=C2=A0 =C2=A0 =C2=A0| 30 ++++++++++++++++++= +++++++++++-
> >=C2=A0 target/arm/kvm32.c=C2=A0 =C2=A0| 25 +++++++++++++++++++++++= ++
> >=C2=A0 target/arm/kvm64.c=C2=A0 =C2=A0| 34 +++++++++++++++++++++++= +++++++++++
> >=C2=A0 target/arm/kvm_arm.h | 10 ++++++++++
> >=C2=A0 5 files changed, 99 insertions(+), 1 deletion(-)
> >
> > diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> > index 4f834c1..868afc6 100644
> > --- a/target/arm/cpu.h
> > +++ b/target/arm/cpu.h
> > @@ -561,6 +561,7 @@ typedef struct CPUARMState {
> >=C2=A0 =C2=A0 =C2=A0 } serror;
> >
> >=C2=A0 =C2=A0 =C2=A0 uint8_t ext_dabt_pending; /* Request for inje= cting ext DABT */
> > +=C2=A0 =C2=A0 uint8_t ext_dabt_raised; /* Tracking/verifying inj= ection of ext DABT */
> >
> >=C2=A0 =C2=A0 =C2=A0 /* State of our input IRQ/FIQ/VIRQ/VFIQ lines= */
> >=C2=A0 =C2=A0 =C2=A0 uint32_t irq_line_state;
> > diff --git a/target/arm/kvm.c b/target/arm/kvm.c
> > index c088589..58ad734 100644
> > --- a/target/arm/kvm.c
> > +++ b/target/arm/kvm.c
> > @@ -721,7 +721,12 @@ int kvm_put_vcpu_events(ARMCPU *cpu)
> >=C2=A0 =C2=A0 =C2=A0 ret =3D kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU= _EVENTS, &events);
> >=C2=A0 =C2=A0 =C2=A0 if (ret) {
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 error_report("failed to pu= t vcpu events");
> > -=C2=A0 =C2=A0 } else {
> > +=C2=A0 =C2=A0 } else if (env->ext_dabt_pending) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 /*
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0* Mark that the external DABT = has been injected,
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0* if one has been requested > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0*/
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 env->ext_dabt_raised =3D env->= ext_dabt_pending;
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Clear instantly if the call = was successful */
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 env->ext_dabt_pending =3D 0;=
> >=C2=A0 =C2=A0 =C2=A0 }
> > @@ -755,6 +760,29 @@ int kvm_get_vcpu_events(ARMCPU *cpu)
> >
> >=C2=A0 void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) > >=C2=A0 {
> > +=C2=A0 =C2=A0 ARMCPU *cpu =3D ARM_CPU(cs);
> > +=C2=A0 =C2=A0 CPUARMState *env =3D &cpu->env;
> > +
> > +=C2=A0 =C2=A0 if (unlikely(env->ext_dabt_raised)) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 /*
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0* Verifying that the ext DABT = has been properly injected,
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0* otherwise risking indefinite= ly re-running the faulting instruction
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0* Covering a very narrow case = for kernels 5.5..5.5.4
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0* when injected abort was misc= onfigured to be
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0* an IMPLEMENTATION DEFINED ex= ception (for 32-bit EL1)
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0*/
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (!arm_feature(env, ARM_FEATURE_AA= RCH64) &&
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 unlikely(!kvm_arm_veri= fy_ext_dabt_pending(cs))) {
> > +
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 error_report("Dat= a abort exception with no valid ISS generated by "
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0"guest memory access. KVM unable to emulate faulting "
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0"instruction. Failed to inject an external data abort "
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0"into the guest.");
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 abort();
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0}
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0/* Clear the status */
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0env->ext_dabt_raised =3D 0;
> > +=C2=A0 =C2=A0 }
> >=C2=A0 }
> >
> >=C2=A0 MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *= run)
> > diff --git a/target/arm/kvm32.c b/target/arm/kvm32.c
> > index f271181..86c4fe7 100644
> > --- a/target/arm/kvm32.c
> > +++ b/target/arm/kvm32.c
> > @@ -564,3 +564,28 @@ void kvm_arm_pmu_init(CPUState *cs)
> >=C2=A0 {
> >=C2=A0 =C2=A0 =C2=A0 qemu_log_mask(LOG_UNIMP, "%s: not implem= ented\n", __func__);
> >=C2=A0 }
> > +
> > +#define ARM_REG_DFSR=C2=A0 ARM_CP15_REG32(0, 5, 0, 0)
> > +#define ARM_REG_TTBCR ARM_CP15_REG32(0, 2, 0, 2)
> > +
> > +#define DFSR_FSC(v)=C2=A0 =C2=A0(((v) >> 6 | (v)) & 0x= 1F)
> > +#define DFSC_EXTABT(lpae) (lpae) ? 0x10 : 0x08
>
> We should put () around the whole ?: expression when it's in a mac= ro
>
> > +
> > +bool kvm_arm_verify_ext_dabt_pending(CPUState *cs)
> > +{
> > +=C2=A0 =C2=A0 uint32_t dfsr_val;
> > +
> > +=C2=A0 =C2=A0 if (!kvm_get_one_reg(cs, ARM_REG_DFSR, &dfsr_v= al)) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 ARMCPU *cpu =3D ARM_CPU(cs);
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 CPUARMState *env =3D &cpu->en= v;
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 uint32_t ttbcr;
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 int lpae =3D 0;
> > +
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (!kvm_get_one_reg(cs, ARM_REG_TTB= CR, &ttbcr)) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 lpae =3D arm_feature(e= nv, ARM_FEATURE_LPAE) && (ttbcr & TTBCR_EAE);
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return !(DFSR_FSC(dfsr_val) !=3D DFS= C_EXTABT(lpae));
>
>=C2=A0 !(a !=3D b) is a convoluted way to write a =3D=3D b
>
> > +=C2=A0 =C2=A0 }
> > +=C2=A0 =C2=A0 return false;
> > +}
> > +
> > diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
> > index be5b31c..18594e9 100644
> > --- a/target/arm/kvm64.c
> > +++ b/target/arm/kvm64.c
> > @@ -1430,3 +1430,37 @@ bool kvm_arm_handle_debug(CPUState *cs, st= ruct kvm_debug_exit_arch *debug_exit)
> >
> >=C2=A0 =C2=A0 =C2=A0 return false;
> >=C2=A0 }
> > +
> > +#define ARM64_REG_ESR_EL1 ARM64_SYS_REG(3, 0, 5, 2, 0)
> > +#define ARM64_REG_TCR_EL1 ARM64_SYS_REG(3, 0, 2, 0, 2)
> > +
> > +#define ESR_DFSC(aarch64, v)=C2=A0 =C2=A0 \
> > +=C2=A0 =C2=A0 ((aarch64) ? ((v) & 0x3F)=C2=A0 =C2=A0\
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0: (((v) &= gt;> 6 | (v)) & 0x1F))
> > +
> > +#define ESR_DFSC_EXTABT(aarch64, lpae) \
> > +=C2=A0 =C2=A0 ((aarch64) ? 0x10 : (lpae) ? 0x10 : 0x8)
> > +
> > +bool kvm_arm_verify_ext_dabt_pending(CPUState *cs)
> > +{
> > +=C2=A0 =C2=A0 uint64_t dfsr_val;
> > +
> > +=C2=A0 =C2=A0 if (!kvm_get_one_reg(cs, ARM64_REG_ESR_EL1, &d= fsr_val)) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 ARMCPU *cpu =3D ARM_CPU(cs);
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 CPUARMState *env =3D &cpu->en= v;
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 int aarch64_mode =3D arm_feature(env= , ARM_FEATURE_AARCH64);
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 int lpae =3D 0;
> > +
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 if (!aarch64_mode) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 uint64_t ttbcr;
> > +
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (!kvm_get_one_reg(c= s, ARM64_REG_TCR_EL1, &ttbcr)) {
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 lpae =3D= arm_feature(env, ARM_FEATURE_LPAE)
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 && (ttbcr & TTBCR_EAE);
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 }
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 return !(ESR_DFSC(aarch64_mode, dfsr= _val) !=3D
> > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 ESR_DFSC= _EXTABT(aarch64_mode, lpae));
>
> a =3D=3D b, please
>
> > +=C2=A0 =C2=A0 }
> > +=C2=A0 =C2=A0 return false;
> > +}
> > diff --git a/target/arm/kvm_arm.h b/target/arm/kvm_arm.h
> > index 39472d5..f2dc6a2 100644
> > --- a/target/arm/kvm_arm.h
> > +++ b/target/arm/kvm_arm.h
> > @@ -461,6 +461,16 @@ void kvm_arm_copy_hw_debug_data(struct kvm_g= uest_debug_arch *ptr);
> >=C2=A0 int kvm_arm_handle_dabt_nisv(CPUState *cs, uint64_t esr_iss= ,
> >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0uint64_t fault_ipa);
> >=C2=A0 /**
> > + * kvm_arm_verify_ext_dabt_pending:
> > + * @cs: CPUState
> > + *
> > + * Verify the fault status code wrt the Ext DABT injection
> > + *
> > + * Returns: true if the fault status code is as expected, false = otherwise
> > + */
> > +bool kvm_arm_verify_ext_dabt_pending(CPUState *cs);
> > +
> > +/**
> >=C2=A0 =C2=A0* its_class_name:
> >=C2=A0 =C2=A0*
> >=C2=A0 =C2=A0* Return the ITS class name to use depending on wheth= er KVM acceleration
> > --
> > 2.7.4
> >
> >
>
> I'll leave the decision to take this KVM bug workaround patch at a= ll to Peter,
> and I didn't actually review whether or not kvm_arm_verify_ext_dab= t_pending
> is doing what it claims it's doing, so I'm reluctant to give a= n r-b on
> this patch. But, as far as the code goes, besides the comments above, = it
> looks fine to me.
>
Thanks for the feedback.
Will apply the changes for the next version.

BR
Beata
> Thanks,
> drew
>
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