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bh=SC8tyGtOpHm57sc5gE2Q5QspKh0iTcK1s5Xp662IVFM=; b=bLmIw/Dnp013bTJh5nqjQINRo7akkL9LicewuIwLUsYv+Jbri8tEVWP/88P+t505GH fcaG5L9nF+Jso/8/ee4Ltn38BzkjX7t6ZqDFUmCkb+igbnH9+O0Oibpolp26L26jeyhH deR+A8Q5heuPemDX7qoK8+mGuCJt/2WFx/nDL1i2G95nmeeDHYoQOCfLtvU8FcQXFOah CRFvz1099Ai9qEGXC4wTF7XljMx8idtMbETfsWFIOD3OGAMCntpl2fkKBHlJtTIC1s+8 XLq19iIp7SMlcfxGTnXltiasHa30ZcSh8Y/Bm/j9aHHCu/m7JW1H/+Qw952g82q8kGaV yZ9w== X-Gm-Message-State: APjAAAU0SznfqrwEHGf/gDlrk/MzNDXDe1QxB/dHiR4+l02f4LVqbWKy 6L25Jb0Kqp42v1+UhTxa9lVNnYnp/9kmQCo2MY5feQ== X-Google-Smtp-Source: APXvYqxhAKVjdI+Q5/kjVBzMiDyMQfHBUGw1YvkgVaqNl4hsrZJ80QL4YuEgtGr+aDxrHsLz9SA+9eBupzonnI/zSlM= X-Received: by 2002:a05:6830:184:: with SMTP id q4mr5759307ota.232.1581435250516; Tue, 11 Feb 2020 07:34:10 -0800 (PST) MIME-Version: 1.0 References: <20200130112510.15154-1-eric.auger@redhat.com> <20200130112510.15154-5-eric.auger@redhat.com> In-Reply-To: <20200130112510.15154-5-eric.auger@redhat.com> From: Peter Maydell Date: Tue, 11 Feb 2020 15:33:59 +0000 Message-ID: Subject: Re: [kvm-unit-tests PATCH v2 4/9] arm: pmu: Check Required Event Support To: Eric Auger Cc: kvm-devel , Marc Zyngier , QEMU Developers , qemu-arm , Andre Przywara , Andrew Murray , kvmarm@lists.cs.columbia.edu, Eric Auger X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu Archived-At: List-Archive: On Thu, 30 Jan 2020 at 11:25, Eric Auger wrote: > > If event counters are implemented check the common events > required by the PMUv3 are implemented. > > Some are unconditionally required (SW_INCR, CPU_CYCLES, > either INST_RETIRED or INST_SPEC). Some others only are > required if the implementation implements some other features. > > Check those wich are unconditionally required. > > This test currently fails on TCG as neither INST_RETIRED > or INST_SPEC are supported. > > Signed-off-by: Eric Auger > > --- > > +static bool is_event_supported(uint32_t n, bool warn) > +{ > + uint64_t pmceid0 = read_sysreg(pmceid0_el0); > + uint64_t pmceid1 = read_sysreg_s(PMCEID1_EL0); > + bool supported; > + uint64_t reg; > + > + /* > + * The low 32-bits of PMCEID0/1 respectly describe "respectively" > + * event support for events 0-31/32-63. Their High > + * 32-bits describe support for extended events > + * starting at 0x4000, using the same split. > + */ > + if (n >= 0x0 && n <= 0x3F) > + reg = (pmceid0 & 0xFFFFFFFF) | ((pmceid1 & 0xFFFFFFFF) << 32); > + else if (n >= 0x4000 && n <= 0x403F) > + reg = (pmceid0 >> 32) | ((pmceid1 >> 32) << 32); > + else > + abort(); > + > + supported = reg & (1UL << (n & 0x3F)); > + > + if (!supported && warn) > + report_info("event %d is not supported", n); > + return supported; > +} > + > +static void test_event_introspection(void) > +{ > + bool required_events; > + > + if (!pmu.nb_implemented_counters) { > + report_skip("No event counter, skip ..."); > + return; > + } > + > + /* PMUv3 requires an implementation includes some common events */ > + required_events = is_event_supported(0x0, true) /* SW_INCR */ && > + is_event_supported(0x11, true) /* CPU_CYCLES */ && > + (is_event_supported(0x8, true) /* INST_RETIRED */ || > + is_event_supported(0x1B, true) /* INST_PREC */); > + > + if (pmu.version == 0x4) { This condition will only test for v8.1-required events if the PMU is exactly 8.1, so you lose coverage if the implementation happens to support ARMv8.4-PMU. Hopefully you have already bailed out for "ID_AA64DFR0_EL1.PMUVer == 0xf" which means "non-standard IMPDEF PMU", in which case you can just check >= 0x4. > + /* ARMv8.1 PMU: STALL_FRONTEND and STALL_BACKEND are required */ > + required_events = required_events && > + is_event_supported(0x23, true) && > + is_event_supported(0x24, true); > + } > + > + report(required_events, "Check required events are implemented"); > +} > + > #endif thanks -- PMM _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm