From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34DA4C4332F for ; Tue, 18 Oct 2022 00:46:39 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id A538C4B7B5; Mon, 17 Oct 2022 20:46:38 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Authentication-Results: mm01.cs.columbia.edu (amavisd-new); dkim=softfail (fail, message has been altered) header.i=@redhat.com Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Axy39R5C7qf7; Mon, 17 Oct 2022 20:46:37 -0400 (EDT) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 0E1C94B7C2; Mon, 17 Oct 2022 20:46:37 -0400 (EDT) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 8940B4B7A9 for ; Mon, 17 Oct 2022 20:46:35 -0400 (EDT) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HMu8-ExkVji9 for ; Mon, 17 Oct 2022 20:46:34 -0400 (EDT) Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 03F094B642 for ; Mon, 17 Oct 2022 20:46:33 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1666053993; h=from:from:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=G5ql+ZHZqoj03bFqQztJ8LdTDZnWgqOwdaisBDDNe/I=; b=anSq/iGoL2Tp6B0wGMYJNeop84fS6MnHQeaHPuyG8nw0KAWkIPmr4eWNWFhMM8dbez3jlk Qzu0JQrgFf37lF80jyJumfQGI5IixteBjcYw1FAyovoC3UmmV4qCUaBrdGemZAkwF+0q9o /hiChG2FzCmEj1x9c/cW26yvwWb1Ic8= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-16-eT4pDrE-OVycqNH8JzyLBA-1; Mon, 17 Oct 2022 20:46:28 -0400 X-MC-Unique: eT4pDrE-OVycqNH8JzyLBA-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.rdu2.redhat.com [10.11.54.1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id CC63A811E75; Tue, 18 Oct 2022 00:46:27 +0000 (UTC) Received: from [10.64.54.70] (vpn2-54-70.bne.redhat.com [10.64.54.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3A4E140C2140; Tue, 18 Oct 2022 00:46:15 +0000 (UTC) Subject: Re: [PATCH 4/6] KVM: selftests: memslot_perf_test: Support variable guest page size To: "Maciej S. Szmigiero" References: <20221014071914.227134-1-gshan@redhat.com> <20221014071914.227134-5-gshan@redhat.com> <3eecebca-a526-d10a-02d3-496ce919d577@maciej.szmigiero.name> From: Gavin Shan Message-ID: Date: Tue, 18 Oct 2022 08:46:11 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.0 MIME-Version: 1.0 In-Reply-To: <3eecebca-a526-d10a-02d3-496ce919d577@maciej.szmigiero.name> Content-Language: en-US X-Scanned-By: MIMEDefang 3.1 on 10.11.54.1 Cc: kvm@vger.kernel.org, maz@kernel.org, linux-kernel@vger.kernel.org, zhenyzha@redhat.com, shan.gavin@gmail.com, kvmarm@lists.linux.dev, pbonzini@redhat.com, shuah@kernel.org, kvmarm@lists.cs.columbia.edu, ajones@ventanamicro.com X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list Reply-To: Gavin Shan List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: base64 Content-Type: text/plain; charset="utf-8"; Format="flowed" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu T24gMTAvMTgvMjIgNTozMSBBTSwgTWFjaWVqIFMuIFN6bWlnaWVybyB3cm90ZToKPiBPbiAxNC4x MC4yMDIyIDA5OjE5LCBHYXZpbiBTaGFuIHdyb3RlOgo+PiBUaGUgdGVzdCBjYXNlIGlzIG9idmlv dXNseSBicm9rZW4gb24gYWFyY2g2NCBiZWNhdXNlIG5vbi00S0IgZ3Vlc3QKPj4gcGFnZSBzaXpl IGlzIHN1cHBvcnRlZC4gVGhlIGd1ZXN0IHBhZ2Ugc2l6ZSBvbiBhYXJjaDY0IGNvdWxkIGJlIDRL QiwKPj4gMTZLQiBvciA2NEtCLgo+Pgo+PiBUaGlzIHN1cHBvcnRzIHZhcmlhYmxlIGd1ZXN0IHBh Z2Ugc2l6ZSwgbW9zdGx5IGZvciBhYXJjaDY0Lgo+Pgo+PiDCoMKgIC0gVGhlIGhvc3QgZGV0ZXJt aW5lcyB0aGUgZ3Vlc3QgcGFnZSBzaXplIHdoZW4gdmlydHVhbCBtYWNoaW5lIGlzCj4+IMKgwqDC oMKgIGNyZWF0ZWQuIFRoZSB2YWx1ZSBpcyBhbHNvIHBhc3NlZCB0byBndWVzdCB0aHJvdWdoIHRo ZSBzeW5jaHJvbml6YXRpb24KPj4gwqDCoMKgwqAgYXJlYS4KPj4KPj4gwqDCoCAtIFRoZSBudW1i ZXIgb2YgZ3Vlc3QgcGFnZXMgYXJlIHVua25vd24gdW50aWwgdGhlIHZpcnR1YWwgbWFjaGluZQo+ PiDCoMKgwqDCoCBpcyB0byBiZSBjcmVhdGVkLiBTbyBhbGwgdGhlIHJlbGF0ZWQgbWFjcm9zIGFy ZSBkcm9wcGVkLiBJbnN0ZWFkLAo+PiDCoMKgwqDCoCB0aGVpciB2YWx1ZXMgYXJlIGR5bmFtaWNh bGx5IGNhbGN1bGF0ZWQgYmFzZWQgb24gdGhlIGd1ZXN0IHBhZ2UKPj4gwqDCoMKgwqAgc2l6ZS4K Pj4KPj4gwqDCoCAtIFRoZSBzdGF0aWMgY2hlY2tzIG9uIG1lbW9yeSBzaXplcyBhbmQgcGFnZXMg YmVjb21lcyBkZXBlbmRlbnQKPj4gwqDCoMKgwqAgb24gZ3Vlc3QgcGFnZSBzaXplLCB3aGljaCBp cyB1bmtub3duIHVudGlsIHRoZSB2aXJ0dWFsIG1hY2hpbmUKPj4gwqDCoMKgwqAgaXMgYWJvdXQg dG8gYmUgY3JlYXRlZC4gU28gYWxsIHRoZSBzdGF0aWMgY2hlY2tzIGFyZSBjb252ZXJ0ZWQKPj4g wqDCoMKgwqAgdG8gZHluYW1pYyBjaGVja3MsIGRvbmUgaW4gY2hlY2tfbWVtb3J5X3NpemVzKCku Cj4+Cj4+IMKgwqAgLSBBcyB0aGUgYWRkcmVzcyBwYXNzZWQgdG8gbWFkdmlzZSgpIHNob3VsZCBi ZSBhbGlnbmVkIHRvIGhvc3QgcGFnZSwKPj4gwqDCoMKgwqAgdGhlIHNpemUgb2YgcGFnZSBjaHVu ayBpcyBhdXRvbWF0aWNhbGx5IHNlbGVjdGVkLCBvdGhlciB0aGFuIG9uZQo+PiDCoMKgwqDCoCBw YWdlLgo+Pgo+PiDCoMKgIC0gQWxsIG90aGVyIGNoYW5nZXMgaW5jbHVkZWQgaW4gdGhpcyBwYXRj aCBhcmUgYWxtb3N0IG1lY2hhbmljYWwKPj4gwqDCoMKgwqAgcmVwbGFjaW5nICc0MDk2JyB3aXRo ICdndWVzdF9wYWdlX3NpemUnLgo+Pgo+PiBTaWduZWQtb2ZmLWJ5OiBHYXZpbiBTaGFuIDxnc2hh bkByZWRoYXQuY29tPgo+PiAtLS0KPj4gwqAgLi4uL3Rlc3Rpbmcvc2VsZnRlc3RzL2t2bS9tZW1z bG90X3BlcmZfdGVzdC5jIHwgMTkxICsrKysrKysrKysrLS0tLS0tLQo+PiDCoCAxIGZpbGUgY2hh bmdlZCwgMTE1IGluc2VydGlvbnMoKyksIDc2IGRlbGV0aW9ucygtKQo+Pgo+PiBkaWZmIC0tZ2l0 IGEvdG9vbHMvdGVzdGluZy9zZWxmdGVzdHMva3ZtL21lbXNsb3RfcGVyZl90ZXN0LmMgYi90b29s cy90ZXN0aW5nL3NlbGZ0ZXN0cy9rdm0vbWVtc2xvdF9wZXJmX3Rlc3QuYwo+PiBpbmRleCBkNWFh OTE0OGY5NmYuLmQ1ODdiZDk1MmZmOSAxMDA2NDQKPj4gLS0tIGEvdG9vbHMvdGVzdGluZy9zZWxm dGVzdHMva3ZtL21lbXNsb3RfcGVyZl90ZXN0LmMKPj4gKysrIGIvdG9vbHMvdGVzdGluZy9zZWxm dGVzdHMva3ZtL21lbXNsb3RfcGVyZl90ZXN0LmMKPj4gQEAgLTI2LDE0ICsyNiwxMSBAQAo+PiDC oCAjaW5jbHVkZSA8cHJvY2Vzc29yLmg+Cj4+IMKgICNkZWZpbmUgTUVNX1NJWkXCoMKgwqDCoMKg wqDCoCAoKDUxMlUgPDwgMjApICsgNDA5NikKPj4gLSNkZWZpbmUgTUVNX1NJWkVfUEFHRVPCoMKg wqDCoMKgwqDCoCAoTUVNX1NJWkUgLyA0MDk2KQo+PiDCoCAjZGVmaW5lIE1FTV9HUEHCoMKgwqDC oMKgwqDCoCAweDEwMDAwMDAwVUwKPj4gwqAgI2RlZmluZSBNRU1fQVVYX0dQQcKgwqDCoMKgwqDC oMKgIE1FTV9HUEEKPj4gwqAgI2RlZmluZSBNRU1fU1lOQ19HUEHCoMKgwqDCoMKgwqDCoCBNRU1f QVVYX0dQQQo+PiDCoCAjZGVmaW5lIE1FTV9URVNUX0dQQcKgwqDCoMKgwqDCoMKgIChNRU1fQVVY X0dQQSArIDQwOTYpCj4+IMKgICNkZWZpbmUgTUVNX1RFU1RfU0laRcKgwqDCoMKgwqDCoMKgIChN RU1fU0laRSAtIDQwOTYpCj4+IC1zdGF0aWNfYXNzZXJ0KE1FTV9TSVpFICUgNDA5NiA9PSAwLCAi aW52YWxpZCBtZW0gc2l6ZSIpOwo+PiAtc3RhdGljX2Fzc2VydChNRU1fVEVTVF9TSVpFICUgNDA5 NiA9PSAwLCAiaW52YWxpZCBtZW0gdGVzdCBzaXplIik7Cj4+IMKgIC8qCj4+IMKgwqAgKiAzMiBN aUIgaXMgbWF4IHNpemUgdGhhdCBnZXRzIHdlbGwgb3ZlciAxMDAgaXRlcmF0aW9ucyBvbiA1MDkg c2xvdHMuCj4+IEBAIC00MiwyOSArMzksMTYgQEAgc3RhdGljX2Fzc2VydChNRU1fVEVTVF9TSVpF ICUgNDA5NiA9PSAwLCAiaW52YWxpZCBtZW0gdGVzdCBzaXplIik7Cj4+IMKgwqAgKiBsaW1pdGVk IHJlc29sdXRpb24pLgo+PiDCoMKgICovCj4+IMKgICNkZWZpbmUgTUVNX1NJWkVfTUFQwqDCoMKg wqDCoMKgwqAgKCgzMlUgPDwgMjApICsgNDA5NikKPj4gLSNkZWZpbmUgTUVNX1NJWkVfTUFQX1BB R0VTwqDCoMKgIChNRU1fU0laRV9NQVAgLyA0MDk2KQo+PiDCoCAjZGVmaW5lIE1FTV9URVNUX01B UF9TSVpFwqDCoMKgIChNRU1fU0laRV9NQVAgLSA0MDk2KQo+PiAtI2RlZmluZSBNRU1fVEVTVF9N QVBfU0laRV9QQUdFUyAoTUVNX1RFU1RfTUFQX1NJWkUgLyA0MDk2KQo+PiAtc3RhdGljX2Fzc2Vy dChNRU1fU0laRV9NQVAgJSA0MDk2ID09IDAsICJpbnZhbGlkIG1hcCB0ZXN0IHJlZ2lvbiBzaXpl Iik7Cj4+IC1zdGF0aWNfYXNzZXJ0KE1FTV9URVNUX01BUF9TSVpFICUgNDA5NiA9PSAwLCAiaW52 YWxpZCBtYXAgdGVzdCByZWdpb24gc2l6ZSIpOwo+PiAtc3RhdGljX2Fzc2VydChNRU1fVEVTVF9N QVBfU0laRV9QQUdFUyAlIDIgPT0gMCwgImludmFsaWQgbWFwIHRlc3QgcmVnaW9uIHNpemUiKTsK Pj4gLXN0YXRpY19hc3NlcnQoTUVNX1RFU1RfTUFQX1NJWkVfUEFHRVMgPiAyLCAiaW52YWxpZCBt YXAgdGVzdCByZWdpb24gc2l6ZSIpOwo+PiDCoCAvKgo+PiDCoMKgICogMTI4IE1pQiBpcyBtaW4g c2l6ZSB0aGF0IGZpbGxzIDMyayBzbG90cyB3aXRoIGF0IGxlYXN0IG9uZSBwYWdlIGluIGVhY2gK Pj4gwqDCoCAqIHdoaWxlIGF0IHRoZSBzYW1lIHRpbWUgZ2V0cyAxMDArIGl0ZXJhdGlvbnMgaW4g c3VjaCB0ZXN0Cj4+ICsgKgo+PiArICogMiBNaUIgY2h1bmsgc2l6ZSBsaWtlIGEgdHlwaWNhbCBo dWdlIHBhZ2UKPj4gwqDCoCAqLwo+PiDCoCAjZGVmaW5lIE1FTV9URVNUX1VOTUFQX1NJWkXCoMKg wqDCoMKgwqDCoCAoMTI4VSA8PCAyMCkKPj4gLSNkZWZpbmUgTUVNX1RFU1RfVU5NQVBfU0laRV9Q QUdFU8KgwqDCoCAoTUVNX1RFU1RfVU5NQVBfU0laRSAvIDQwOTYpCj4+IC0vKiAyIE1pQiBjaHVu ayBzaXplIGxpa2UgYSB0eXBpY2FsIGh1Z2UgcGFnZSAqLwo+PiAtI2RlZmluZSBNRU1fVEVTVF9V Tk1BUF9DSFVOS19QQUdFU8KgwqDCoCAoMlUgPDwgKDIwIC0gMTIpKQo+PiAtc3RhdGljX2Fzc2Vy dChNRU1fVEVTVF9VTk1BUF9TSVpFIDw9IE1FTV9URVNUX1NJWkUsCj4+IC3CoMKgwqDCoMKgwqDC oMKgwqAgImludmFsaWQgdW5tYXAgdGVzdCByZWdpb24gc2l6ZSIpOwo+PiAtc3RhdGljX2Fzc2Vy dChNRU1fVEVTVF9VTk1BUF9TSVpFICUgNDA5NiA9PSAwLAo+PiAtwqDCoMKgwqDCoMKgwqDCoMKg ICJpbnZhbGlkIHVubWFwIHRlc3QgcmVnaW9uIHNpemUiKTsKPj4gLXN0YXRpY19hc3NlcnQoTUVN X1RFU1RfVU5NQVBfU0laRV9QQUdFUyAlCj4+IC3CoMKgwqDCoMKgwqDCoMKgwqAgKDIgKiBNRU1f VEVTVF9VTk1BUF9DSFVOS19QQUdFUykgPT0gMCwKPj4gLcKgwqDCoMKgwqDCoMKgwqDCoCAiaW52 YWxpZCB1bm1hcCB0ZXN0IHJlZ2lvbiBzaXplIik7Cj4+ICsjZGVmaW5lIE1FTV9URVNUX1VOTUFQ X0NIVU5LX1NJWkXCoMKgwqAgKDJVIDw8IDIwKQo+PiDCoCAvKgo+PiDCoMKgICogRm9yIHRoZSBt b3ZlIGFjdGl2ZSB0ZXN0IHRoZSBtaWRkbGUgb2YgdGhlIHRlc3QgYXJlYSBpcyBwbGFjZWQgb24K Pj4gQEAgLTc3LDggKzYxLDcgQEAgc3RhdGljX2Fzc2VydChNRU1fVEVTVF9VTk1BUF9TSVpFX1BB R0VTICUKPj4gwqDCoCAqIGZvciB0aGUgdG90YWwgc2l6ZSBvZiAyNSBwYWdlcy4KPj4gwqDCoCAq IEhlbmNlLCB0aGUgbWF4aW11bSBzaXplIGhlcmUgaXMgNTAgcGFnZXMuCj4+IMKgwqAgKi8KPj4g LSNkZWZpbmUgTUVNX1RFU1RfTU9WRV9TSVpFX1BBR0VTwqDCoMKgICg1MCkKPj4gLSNkZWZpbmUg TUVNX1RFU1RfTU9WRV9TSVpFwqDCoMKgwqDCoMKgwqAgKE1FTV9URVNUX01PVkVfU0laRV9QQUdF UyAqIDQwOTYpCj4+ICsjZGVmaW5lIE1FTV9URVNUX01PVkVfU0laRcKgwqDCoMKgwqDCoMKgIDB4 MzIwMDAKPiAKPiBUaGUgYWJvdmUgbnVtYmVyIHNlZW1zIGxlc3MgcmVhZGFibGUgdGhhbiBhbiBl eHBsaWNpdCB2YWx1ZSBvZiA1MCBwYWdlcy4KPiAKPiBJbiBhZGRpdGlvbiB0byB0aGF0LCBpdCdz IDUwIHBhZ2VzIG9ubHkgd2l0aCA0ayBwYWdlIHNpemUsIHNvIGF0IGxlYXN0Cj4gdGhlIGNvbW1l bnQgYWJvdmUgbmVlZHMgdG8gYmUgdXBkYXRlZCB0byByZWZsZWN0IHRoaXMgZmFjdC4KPiAKClll YWgsIEkgd2lsbCBjaGFuZ2UgdGhlIGNvbW1lbnRzIGxpa2UgYmVsb3cgaW4gbmV4dCByZXZpc2lv bi4KCiAgLyoKICAgKiBXaGVuIHJ1bm5pbmcgdGhpcyB0ZXN0IHdpdGggMzJrIG1lbXNsb3RzLCBh Y3R1YWxseSAzMjc2MyBleGNsdWRpbmcKICAgKiB0aGUgcmVzZXJ2ZWQgbWVtb3J5IHNsb3QgMCwg dGhlIG1lbW9yeSBmb3IgZWFjaCBzbG90IGlzIDB4NDAwMCBieXRlcy4KICAgKiBUaGUgbGFzdCBz bG90IGNvbnRhaW5zIDB4MTkwMDAgYnl0ZXMgbWVtb3J5LiBIZW5jZSwgdGhlIG1heGltdW0gc2l6 ZQogICAqIGhlcmUgaXMgMHgzMjAwMCBieXRlcy4KICAgKi8KCj4+IMKgICNkZWZpbmUgTUVNX1RF U1RfTU9WRV9HUEFfREVTVMKgwqDCoMKgwqDCoMKgIChNRU1fR1BBICsgTUVNX1NJWkUpCj4+IMKg IHN0YXRpY19hc3NlcnQoTUVNX1RFU1RfTU9WRV9TSVpFIDw9IE1FTV9URVNUX1NJWkUsCj4+IMKg wqDCoMKgwqDCoMKgwqDCoMKgwqAgImludmFsaWQgbW92ZSB0ZXN0IHJlZ2lvbiBzaXplIik7Cj4g KC4uLikKPj4gQEAgLTI0MiwzMyArMjI5LDM0IEBAIHN0YXRpYyBzdHJ1Y3Qgdm1fZGF0YSAqYWxs b2Nfdm0odm9pZCkKPj4gwqAgfQo+PiDCoCBzdGF0aWMgYm9vbCBwcmVwYXJlX3ZtKHN0cnVjdCB2 bV9kYXRhICpkYXRhLCBpbnQgbnNsb3RzLCB1aW50NjRfdCAqbWF4c2xvdHMsCj4+IC3CoMKgwqDC oMKgwqDCoMKgwqDCoMKgwqDCoMKgIHZvaWQgKmd1ZXN0X2NvZGUsIHVpbnQ2NF90IG1lbXBhZ2Vz LAo+PiArwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoCB2b2lkICpndWVzdF9jb2RlLCB1aW50 NjRfdCBtZW1fc2l6ZSwKPj4gwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqDCoMKgwqAgc3RydWN0 IHRpbWVzcGVjICpzbG90X3J1bnRpbWUpCj4+IMKgIHsKPj4gLcKgwqDCoCB1aW50NjRfdCByZW1w YWdlczsKPj4gK8KgwqDCoCB1aW50NjRfdCBtZW1wYWdlcywgcmVtcGFnZXM7Cj4+IMKgwqDCoMKg wqAgdWludDY0X3QgZ3Vlc3RfYWRkcjsKPj4gLcKgwqDCoCB1aW50MzJfdCBzbG90Owo+PiArwqDC oMKgIHVpbnQzMl90IHNsb3QsIGd1ZXN0X3BhZ2Vfc2l6ZTsKPj4gwqDCoMKgwqDCoCBzdHJ1Y3Qg dGltZXNwZWMgdHN0YXJ0Owo+PiDCoMKgwqDCoMKgIHN0cnVjdCBzeW5jX2FyZWEgKnN5bmM7Cj4+ IC3CoMKgwqAgVEVTVF9BU1NFUlQobWVtcGFnZXMgPiAxLAo+PiAtwqDCoMKgwqDCoMKgwqDCoMKg wqDCoCAiQ2FuJ3QgdGVzdCB3aXRob3V0IGFueSBtZW1vcnkiKTsKPj4gK8KgwqDCoCBndWVzdF9w YWdlX3NpemUgPSB2bV9ndWVzdF9tb2RlX3BhcmFtc1tWTV9NT0RFX0RFRkFVTFRdLnBhZ2Vfc2l6 ZTsKPj4gK8KgwqDCoCBtZW1wYWdlcyA9IG1lbV9zaXplIC8gZ3Vlc3RfcGFnZV9zaXplOwo+PiAr Cj4+ICvCoMKgwqAgZGF0YS0+dm0gPSBfX3ZtX2NyZWF0ZV93aXRoX29uZV92Y3B1KCZkYXRhLT52 Y3B1LCBtZW1wYWdlcywgZ3Vlc3RfY29kZSk7Cj4+ICvCoMKgwqAgdWNhbGxfaW5pdChkYXRhLT52 bSwgTlVMTCk7Cj4+Cj4gCj4gVEVTVF9BU1NFUlQoZGF0YS0+dm0tPnBhZ2Vfc2l6ZSA9PSBndWVz dF9wYWdlX3NpemUsICJJbnZhbGlkIFZNIHBhZ2Ugc2l6ZSIpCj4gaGVyZSB3b3VsZCBjYXRjaCB0 aGUgY2FzZSBpZiBzb21lb25lIGFjY2lkZW50YWxseSBtb2RpZmllcwo+IF9fdm1fY3JlYXRlX3dp dGhfb25lX3ZjcHUoKSB0byB1c2Ugb3RoZXIgcGFnZSBzaXplIHRoYW4gc3BlY2lmaWVkIGZvcgo+ IFZNX01PREVfREVGQVVMVC4KPiAKClN1cmUsIGl0J3Mgbm90IGhhcm1mdWwgYXQgbGVhc3QuCgo+ PiDCoMKgwqDCoMKgIGRhdGEtPm5wYWdlcyA9IG1lbXBhZ2VzOwo+PiArwqDCoMKgIFRFU1RfQVNT RVJUKGRhdGEtPm5wYWdlcyA+IDEsICJDYW4ndCB0ZXN0IHdpdGhvdXQgYW55IG1lbW9yeSIpOwo+ PiDCoMKgwqDCoMKgIGRhdGEtPm5zbG90cyA9IG5zbG90czsKPj4gLcKgwqDCoCBkYXRhLT5wYWdl c19wZXJfc2xvdCA9IG1lbXBhZ2VzIC8gZGF0YS0+bnNsb3RzOwo+PiArwqDCoMKgIGRhdGEtPnBh Z2VzX3Blcl9zbG90ID0gZGF0YS0+bnBhZ2VzIC8gZGF0YS0+bnNsb3RzOwo+PiDCoMKgwqDCoMKg IGlmICghZGF0YS0+cGFnZXNfcGVyX3Nsb3QpIHsKPj4gLcKgwqDCoMKgwqDCoMKgICptYXhzbG90 cyA9IG1lbXBhZ2VzICsgMTsKPj4gK8KgwqDCoMKgwqDCoMKgICptYXhzbG90cyA9IGRhdGEtPm5w YWdlcyArIDE7Cj4+IMKgwqDCoMKgwqDCoMKgwqDCoCByZXR1cm4gZmFsc2U7Cj4+IMKgwqDCoMKg wqAgfQo+PiAtwqDCoMKgIHJlbXBhZ2VzID0gbWVtcGFnZXMgJSBkYXRhLT5uc2xvdHM7Cj4+ICvC oMKgwqAgcmVtcGFnZXMgPSBkYXRhLT5ucGFnZXMgJSBkYXRhLT5uc2xvdHM7Cj4+IMKgwqDCoMKg wqAgZGF0YS0+aHZhX3Nsb3RzID0gbWFsbG9jKHNpemVvZigqZGF0YS0+aHZhX3Nsb3RzKSAqIGRh dGEtPm5zbG90cyk7Cj4+IMKgwqDCoMKgwqAgVEVTVF9BU1NFUlQoZGF0YS0+aHZhX3Nsb3RzLCAi bWFsbG9jKCkgZmFpbCIpOwo+PiAtwqDCoMKgIGRhdGEtPnZtID0gX192bV9jcmVhdGVfd2l0aF9v bmVfdmNwdSgmZGF0YS0+dmNwdSwgbWVtcGFnZXMsIGd1ZXN0X2NvZGUpOwo+PiAtwqDCoMKgIHVj YWxsX2luaXQoZGF0YS0+dm0sIE5VTEwpOwo+PiAtCj4+IMKgwqDCoMKgwqAgcHJfaW5mb192KCJB ZGRpbmcgc2xvdHMgMS4uJWksIGVhY2ggc2xvdCB3aXRoICUiUFJJdTY0IiBwYWdlcyArICUiUFJJ dTY0IiBleHRyYSBwYWdlcyBsYXN0XG4iLAo+PiDCoMKgwqDCoMKgwqDCoMKgwqAgZGF0YS0+bnNs b3RzLCBkYXRhLT5wYWdlc19wZXJfc2xvdCwgcmVtcGFnZXMpOwo+ICguLi4pCj4+IEBAIC04NTYs NiArODYzLDM1IEBAIHN0YXRpYyB2b2lkIGhlbHAoY2hhciAqbmFtZSwgc3RydWN0IHRlc3RfYXJn cyAqdGFyZ3MpCj4+IMKgwqDCoMKgwqDCoMKgwqDCoCBwcl9pbmZvKCIlZDogJXNcbiIsIGN0ciwg dGVzdHNbY3RyXS5uYW1lKTsKPj4gwqAgfQo+PiArc3RhdGljIGJvb2wgY2hlY2tfbWVtb3J5X3Np emVzKHZvaWQpCj4+ICt7Cj4+ICvCoMKgwqAgdWludDMyX3QgZ3Vlc3RfcGFnZV9zaXplID0gdm1f Z3Vlc3RfbW9kZV9wYXJhbXNbVk1fTU9ERV9ERUZBVUxUXS5wYWdlX3NpemU7Cj4+ICsKPj4gK8Kg wqDCoCBpZiAoTUVNX1NJWkUgJSBndWVzdF9wYWdlX3NpemUgfHwKPj4gK8KgwqDCoMKgwqDCoMKg IE1FTV9URVNUX1NJWkUgJSBndWVzdF9wYWdlX3NpemUpIHsKPj4gK8KgwqDCoMKgwqDCoMKgIHBy X2luZm8oImludmFsaWQgTUVNX1NJWkUgb3IgTUVNX1RFU1RfU0laRVxuIik7Cj4+ICvCoMKgwqDC oMKgwqDCoCByZXR1cm4gZmFsc2U7Cj4+ICvCoMKgwqAgfQo+PiArCj4+ICvCoMKgwqAgaWYgKE1F TV9TSVpFX01BUCAlIGd1ZXN0X3BhZ2Vfc2l6ZcKgwqDCoMKgwqDCoMKgIHx8Cj4+ICvCoMKgwqDC oMKgwqDCoCBNRU1fVEVTVF9NQVBfU0laRSAlIGd1ZXN0X3BhZ2Vfc2l6ZcKgwqDCoMKgwqDCoMKg IHx8Cj4+ICvCoMKgwqDCoMKgwqDCoCAoTUVNX1RFU1RfTUFQX1NJWkUgLyBndWVzdF9wYWdlX3Np emUpIDw9IDLCoMKgwqAgfHwKPj4gK8KgwqDCoMKgwqDCoMKgIChNRU1fVEVTVF9NQVBfU0laRSAv IGd1ZXN0X3BhZ2Vfc2l6ZSkgJSAyKSB7Cj4+ICvCoMKgwqDCoMKgwqDCoCBwcl9pbmZvKCJpbnZh bGlkIE1FTV9TSVpFX01BUCBvciBNRU1fVEVTVF9NQVBfU0laRVxuIik7Cj4+ICvCoMKgwqDCoMKg wqDCoCByZXR1cm4gZmFsc2U7Cj4+ICvCoMKgwqAgfQo+PiArCj4+ICvCoMKgwqAgaWYgKE1FTV9U RVNUX1VOTUFQX1NJWkUgPiBNRU1fVEVTVF9TSVpFwqDCoMKgwqDCoMKgwqAgfHwKPj4gK8KgwqDC oMKgwqDCoMKgIE1FTV9URVNUX1VOTUFQX1NJWkUgJSBndWVzdF9wYWdlX3NpemXCoMKgwqAgfHwK Pj4gK8KgwqDCoMKgwqDCoMKgIChNRU1fVEVTVF9VTk1BUF9TSVpFIC8gZ3Vlc3RfcGFnZV9zaXpl KSAlCj4+ICvCoMKgwqDCoMKgwqDCoCAoTUVNX1RFU1RfVU5NQVBfQ0hVTktfU0laRSAvIGd1ZXN0 X3BhZ2Vfc2l6ZSkpIHsKPiAKPiBUaGlzIHNob3VsZCBiZSAoTUVNX1RFU1RfVU5NQVBfU0laRSAv IGd1ZXN0X3BhZ2Vfc2l6ZSkgJSAoMiAqIE1FTV9URVNUX1VOTUFQX0NIVU5LX1NJWkUgLyBndWVz dF9wYWdlX3NpemUpKQo+IHRvIG1hdGNoIHRoZSBvbGQgc3RhdGljX2Fzc2VydCgpLgo+IAoKTmlj ZSBjYXRjaCEgSSB3aWxsIGZpeCBpdCB1cCBpbiBuZXh0IHJldmlzaW9uIDopCgpUaGFua3MsCkdh dmluCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwprdm1h cm0gbWFpbGluZyBsaXN0Cmt2bWFybUBsaXN0cy5jcy5jb2x1bWJpYS5lZHUKaHR0cHM6Ly9saXN0 cy5jcy5jb2x1bWJpYS5lZHUvbWFpbG1hbi9saXN0aW5mby9rdm1hcm0K From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF8217B for ; Tue, 18 Oct 2022 00:46:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1666053991; h=from:from:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=G5ql+ZHZqoj03bFqQztJ8LdTDZnWgqOwdaisBDDNe/I=; b=h/oHIuj0IjJ0gBiHqPg4LNMVkpEEglaZZwQqb4kFftp6lkanwSnVYx+T+CpFT1C+9h4RA7 0VsC4nLbso57SBeM7uHNSIfTwDKaqizihWwsUatXjm7J2U+nCkuYhnK/MRYo7p53BU9TN6 aB+D3Ng032GM8VDEXT3XFlKKtaY0RCc= Received: from mimecast-mx02.redhat.com (mimecast-mx02.redhat.com [66.187.233.88]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-16-eT4pDrE-OVycqNH8JzyLBA-1; Mon, 17 Oct 2022 20:46:28 -0400 X-MC-Unique: eT4pDrE-OVycqNH8JzyLBA-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.rdu2.redhat.com [10.11.54.1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id CC63A811E75; Tue, 18 Oct 2022 00:46:27 +0000 (UTC) Received: from [10.64.54.70] (vpn2-54-70.bne.redhat.com [10.64.54.70]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 3A4E140C2140; Tue, 18 Oct 2022 00:46:15 +0000 (UTC) Reply-To: Gavin Shan Subject: Re: [PATCH 4/6] KVM: selftests: memslot_perf_test: Support variable guest page size To: "Maciej S. Szmigiero" Cc: kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, linux-kernel@vger.kernel.org, ajones@ventanamicro.com, pbonzini@redhat.com, maz@kernel.org, shuah@kernel.org, oliver.upton@linux.dev, seanjc@google.com, peterx@redhat.com, ricarkol@google.com, zhenyzha@redhat.com, shan.gavin@gmail.com, kvmarm@lists.linux.dev References: <20221014071914.227134-1-gshan@redhat.com> <20221014071914.227134-5-gshan@redhat.com> <3eecebca-a526-d10a-02d3-496ce919d577@maciej.szmigiero.name> From: Gavin Shan Message-ID: Date: Tue, 18 Oct 2022 08:46:11 +0800 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.0 Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In-Reply-To: <3eecebca-a526-d10a-02d3-496ce919d577@maciej.szmigiero.name> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit X-Scanned-By: MIMEDefang 3.1 on 10.11.54.1 Message-ID: <20221018004611.bLZjDfg2A6QLoNaH2F2iMntLcRS-cn9vm8z6HC3yyEY@z> On 10/18/22 5:31 AM, Maciej S. Szmigiero wrote: > On 14.10.2022 09:19, Gavin Shan wrote: >> The test case is obviously broken on aarch64 because non-4KB guest >> page size is supported. The guest page size on aarch64 could be 4KB, >> 16KB or 64KB. >> >> This supports variable guest page size, mostly for aarch64. >> >>    - The host determines the guest page size when virtual machine is >>      created. The value is also passed to guest through the synchronization >>      area. >> >>    - The number of guest pages are unknown until the virtual machine >>      is to be created. So all the related macros are dropped. Instead, >>      their values are dynamically calculated based on the guest page >>      size. >> >>    - The static checks on memory sizes and pages becomes dependent >>      on guest page size, which is unknown until the virtual machine >>      is about to be created. So all the static checks are converted >>      to dynamic checks, done in check_memory_sizes(). >> >>    - As the address passed to madvise() should be aligned to host page, >>      the size of page chunk is automatically selected, other than one >>      page. >> >>    - All other changes included in this patch are almost mechanical >>      replacing '4096' with 'guest_page_size'. >> >> Signed-off-by: Gavin Shan >> --- >>   .../testing/selftests/kvm/memslot_perf_test.c | 191 +++++++++++------- >>   1 file changed, 115 insertions(+), 76 deletions(-) >> >> diff --git a/tools/testing/selftests/kvm/memslot_perf_test.c b/tools/testing/selftests/kvm/memslot_perf_test.c >> index d5aa9148f96f..d587bd952ff9 100644 >> --- a/tools/testing/selftests/kvm/memslot_perf_test.c >> +++ b/tools/testing/selftests/kvm/memslot_perf_test.c >> @@ -26,14 +26,11 @@ >>   #include >>   #define MEM_SIZE        ((512U << 20) + 4096) >> -#define MEM_SIZE_PAGES        (MEM_SIZE / 4096) >>   #define MEM_GPA        0x10000000UL >>   #define MEM_AUX_GPA        MEM_GPA >>   #define MEM_SYNC_GPA        MEM_AUX_GPA >>   #define MEM_TEST_GPA        (MEM_AUX_GPA + 4096) >>   #define MEM_TEST_SIZE        (MEM_SIZE - 4096) >> -static_assert(MEM_SIZE % 4096 == 0, "invalid mem size"); >> -static_assert(MEM_TEST_SIZE % 4096 == 0, "invalid mem test size"); >>   /* >>    * 32 MiB is max size that gets well over 100 iterations on 509 slots. >> @@ -42,29 +39,16 @@ static_assert(MEM_TEST_SIZE % 4096 == 0, "invalid mem test size"); >>    * limited resolution). >>    */ >>   #define MEM_SIZE_MAP        ((32U << 20) + 4096) >> -#define MEM_SIZE_MAP_PAGES    (MEM_SIZE_MAP / 4096) >>   #define MEM_TEST_MAP_SIZE    (MEM_SIZE_MAP - 4096) >> -#define MEM_TEST_MAP_SIZE_PAGES (MEM_TEST_MAP_SIZE / 4096) >> -static_assert(MEM_SIZE_MAP % 4096 == 0, "invalid map test region size"); >> -static_assert(MEM_TEST_MAP_SIZE % 4096 == 0, "invalid map test region size"); >> -static_assert(MEM_TEST_MAP_SIZE_PAGES % 2 == 0, "invalid map test region size"); >> -static_assert(MEM_TEST_MAP_SIZE_PAGES > 2, "invalid map test region size"); >>   /* >>    * 128 MiB is min size that fills 32k slots with at least one page in each >>    * while at the same time gets 100+ iterations in such test >> + * >> + * 2 MiB chunk size like a typical huge page >>    */ >>   #define MEM_TEST_UNMAP_SIZE        (128U << 20) >> -#define MEM_TEST_UNMAP_SIZE_PAGES    (MEM_TEST_UNMAP_SIZE / 4096) >> -/* 2 MiB chunk size like a typical huge page */ >> -#define MEM_TEST_UNMAP_CHUNK_PAGES    (2U << (20 - 12)) >> -static_assert(MEM_TEST_UNMAP_SIZE <= MEM_TEST_SIZE, >> -          "invalid unmap test region size"); >> -static_assert(MEM_TEST_UNMAP_SIZE % 4096 == 0, >> -          "invalid unmap test region size"); >> -static_assert(MEM_TEST_UNMAP_SIZE_PAGES % >> -          (2 * MEM_TEST_UNMAP_CHUNK_PAGES) == 0, >> -          "invalid unmap test region size"); >> +#define MEM_TEST_UNMAP_CHUNK_SIZE    (2U << 20) >>   /* >>    * For the move active test the middle of the test area is placed on >> @@ -77,8 +61,7 @@ static_assert(MEM_TEST_UNMAP_SIZE_PAGES % >>    * for the total size of 25 pages. >>    * Hence, the maximum size here is 50 pages. >>    */ >> -#define MEM_TEST_MOVE_SIZE_PAGES    (50) >> -#define MEM_TEST_MOVE_SIZE        (MEM_TEST_MOVE_SIZE_PAGES * 4096) >> +#define MEM_TEST_MOVE_SIZE        0x32000 > > The above number seems less readable than an explicit value of 50 pages. > > In addition to that, it's 50 pages only with 4k page size, so at least > the comment above needs to be updated to reflect this fact. > Yeah, I will change the comments like below in next revision. /* * When running this test with 32k memslots, actually 32763 excluding * the reserved memory slot 0, the memory for each slot is 0x4000 bytes. * The last slot contains 0x19000 bytes memory. Hence, the maximum size * here is 0x32000 bytes. */ >>   #define MEM_TEST_MOVE_GPA_DEST        (MEM_GPA + MEM_SIZE) >>   static_assert(MEM_TEST_MOVE_SIZE <= MEM_TEST_SIZE, >>             "invalid move test region size"); > (...) >> @@ -242,33 +229,34 @@ static struct vm_data *alloc_vm(void) >>   } >>   static bool prepare_vm(struct vm_data *data, int nslots, uint64_t *maxslots, >> -               void *guest_code, uint64_t mempages, >> +               void *guest_code, uint64_t mem_size, >>                  struct timespec *slot_runtime) >>   { >> -    uint64_t rempages; >> +    uint64_t mempages, rempages; >>       uint64_t guest_addr; >> -    uint32_t slot; >> +    uint32_t slot, guest_page_size; >>       struct timespec tstart; >>       struct sync_area *sync; >> -    TEST_ASSERT(mempages > 1, >> -            "Can't test without any memory"); >> +    guest_page_size = vm_guest_mode_params[VM_MODE_DEFAULT].page_size; >> +    mempages = mem_size / guest_page_size; >> + >> +    data->vm = __vm_create_with_one_vcpu(&data->vcpu, mempages, guest_code); >> +    ucall_init(data->vm, NULL); >> > > TEST_ASSERT(data->vm->page_size == guest_page_size, "Invalid VM page size") > here would catch the case if someone accidentally modifies > __vm_create_with_one_vcpu() to use other page size than specified for > VM_MODE_DEFAULT. > Sure, it's not harmful at least. >>       data->npages = mempages; >> +    TEST_ASSERT(data->npages > 1, "Can't test without any memory"); >>       data->nslots = nslots; >> -    data->pages_per_slot = mempages / data->nslots; >> +    data->pages_per_slot = data->npages / data->nslots; >>       if (!data->pages_per_slot) { >> -        *maxslots = mempages + 1; >> +        *maxslots = data->npages + 1; >>           return false; >>       } >> -    rempages = mempages % data->nslots; >> +    rempages = data->npages % data->nslots; >>       data->hva_slots = malloc(sizeof(*data->hva_slots) * data->nslots); >>       TEST_ASSERT(data->hva_slots, "malloc() fail"); >> -    data->vm = __vm_create_with_one_vcpu(&data->vcpu, mempages, guest_code); >> -    ucall_init(data->vm, NULL); >> - >>       pr_info_v("Adding slots 1..%i, each slot with %"PRIu64" pages + %"PRIu64" extra pages last\n", >>           data->nslots, data->pages_per_slot, rempages); > (...) >> @@ -856,6 +863,35 @@ static void help(char *name, struct test_args *targs) >>           pr_info("%d: %s\n", ctr, tests[ctr].name); >>   } >> +static bool check_memory_sizes(void) >> +{ >> +    uint32_t guest_page_size = vm_guest_mode_params[VM_MODE_DEFAULT].page_size; >> + >> +    if (MEM_SIZE % guest_page_size || >> +        MEM_TEST_SIZE % guest_page_size) { >> +        pr_info("invalid MEM_SIZE or MEM_TEST_SIZE\n"); >> +        return false; >> +    } >> + >> +    if (MEM_SIZE_MAP % guest_page_size        || >> +        MEM_TEST_MAP_SIZE % guest_page_size        || >> +        (MEM_TEST_MAP_SIZE / guest_page_size) <= 2    || >> +        (MEM_TEST_MAP_SIZE / guest_page_size) % 2) { >> +        pr_info("invalid MEM_SIZE_MAP or MEM_TEST_MAP_SIZE\n"); >> +        return false; >> +    } >> + >> +    if (MEM_TEST_UNMAP_SIZE > MEM_TEST_SIZE        || >> +        MEM_TEST_UNMAP_SIZE % guest_page_size    || >> +        (MEM_TEST_UNMAP_SIZE / guest_page_size) % >> +        (MEM_TEST_UNMAP_CHUNK_SIZE / guest_page_size)) { > > This should be (MEM_TEST_UNMAP_SIZE / guest_page_size) % (2 * MEM_TEST_UNMAP_CHUNK_SIZE / guest_page_size)) > to match the old static_assert(). > Nice catch! I will fix it up in next revision :) Thanks, Gavin