Re: [PATCH v3 00/17] KVM: arm64: Preliminary NV patches

From: Alexandru Elisei <alexandru.elisei@arm.com>
To: Marc Zyngier <maz@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	 linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Cc: kernel-team@android.com, Andre Przywara <andre.przywara@arm.com>,
	Dave Martin <Dave.Martin@arm.com>,
	George Cherian <gcherian@marvell.com>,
	"Zengtao \(B\)" <prime.zeng@hisilicon.com>,
	Will Deacon <will@kernel.org>
Subject: Re: [PATCH v3 00/17] KVM: arm64: Preliminary NV patches
Date: Tue, 7 Jul 2020 12:24:28 +0100	[thread overview]
Message-ID: <c5cd34b2-3360-e634-fe0f-9bbb91275235@arm.com> (raw)
In-Reply-To: <20200706125425.1671020-1-maz@kernel.org>

Hi,

On 7/6/20 1:54 PM, Marc Zyngier wrote:
> Hi all,
>
> In order not to repeat the 90+ patch series that resulted in a
> deafening silence last time, I've extracted a smaller set of patches
> that form the required dependencies that allow the rest of the 65 NV
> patches to be added on top. Yes, it is that bad.
>
> The one real feature here is support for the ARMv8.4-TTL extension at
> Stage-2 only. The reason to support it is that it helps the hypervisor
> a lot when it comes to finding out how much to invalidate. It is thus
> always "supported" with NV.
>
> The rest doesn't contain any functionality change. Most of it reworks
> existing data structures and adds new accessors for the things that
> get moved around. The reason for this is that:
>
> - With NV, we end-up with multiple Stage-2 MMU contexts per VM instead
>   of a single one. This requires we divorce struct kvm from the S2 MMU
>   configuration. Of course, we stick with a single MMU context for now.
>
> - With ARMv8.4-NV, a number of system register accesses are turned
>   into memory accesses into the so-called VNCR page. It is thus
>   convenient to make this VNCR page part of the vcpu context and avoid
>   copying data back and forth. For this to work, we need to make sure
>   that all the VNCR-aware sysregs are moved into our per-vcpu sys_regs
>   array instead of leaving in other data structures (the timers, for
>   example). The VNCR page itself isn't introduced with these patches.
>
> - As some of these data structures change, we need a way to isolate
>   the userspace ABI from such change.
>
> There is also a number of cleanups that were in the full fat series
> that I decided to move early to get them out of the way.
>
> The whole this is a bit of a mix of vaguely unrelated "stuff", but it
> all comes together if you look at the final series. This applies on
> top of David Brazdil's series splitting the VHE and nVHE objects.
>
> I plan on taking this early into v5.9, and I really mean it this time!
>
> Catalin: How do you want to proceed for patches 2, 3, and 4? I could
> make a stable branch that gets you pull into the arm64 tree, or the
> other way around. Just let me know.
>
> Thanks,
>
> 	M.
>
> * From v2:
>   - Rebased on top of David's el2-obj series

I tried to apply the patches on top of v5.8-rc1, but I get a conflict on the very
first patch. I guess it's because I don't have the el2-obj series. Is that v4 of
"Split off nVHE hyp code" patches from David Brazil?

Thanks,
Alex
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