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Tue, 27 Oct 2020 14:59:14 +0000 MIME-Version: 1.0 Date: Tue, 27 Oct 2020 14:59:14 +0000 From: Marc Zyngier To: James Morse Subject: Re: [PATCH 04/11] KVM: arm64: Move PC rollback on SError to HYP In-Reply-To: References: <20201026133450.73304-1-maz@kernel.org> <20201026133450.73304-5-maz@kernel.org> User-Agent: Roundcube Webmail/1.4.9 Message-ID: X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: james.morse@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com, ascull@google.com, will@kernel.org, qperret@google.com, dbrazdil@google.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, kernel-team@android.com, Will Deacon , kvmarm@lists.cs.columbia.edu X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On 2020-10-27 14:56, James Morse wrote: > Hi Marc, > > On 26/10/2020 13:34, Marc Zyngier wrote: >> Instead of handling the "PC rollback on SError during HVC" at EL1 >> (which >> requires disclosing PC to a potentially untrusted kernel), let's move >> this fixup to ... fixup_guest_exit(), which is where we do all fixups. > >> diff --git a/arch/arm64/kvm/hyp/include/hyp/switch.h >> b/arch/arm64/kvm/hyp/include/hyp/switch.h >> index d687e574cde5..668f02c7b0b3 100644 >> --- a/arch/arm64/kvm/hyp/include/hyp/switch.h >> +++ b/arch/arm64/kvm/hyp/include/hyp/switch.h >> @@ -411,6 +411,21 @@ static inline bool fixup_guest_exit(struct >> kvm_vcpu *vcpu, u64 *exit_code) >> if (ARM_EXCEPTION_CODE(*exit_code) != ARM_EXCEPTION_IRQ) >> vcpu->arch.fault.esr_el2 = read_sysreg_el2(SYS_ESR); >> >> + if (ARM_SERROR_PENDING(*exit_code)) { >> + u8 esr_ec = kvm_vcpu_trap_get_class(vcpu); >> + >> + /* >> + * HVC already have an adjusted PC, which we need to >> + * correct in order to return to after having injected >> + * the SError. >> + * >> + * SMC, on the other hand, is *trapped*, meaning its >> + * preferred return address is the SMC itself. >> + */ >> + if (esr_ec == ESR_ELx_EC_HVC32 || esr_ec == ESR_ELx_EC_HVC64) >> + *vcpu_pc(vcpu) -= 4; > > Isn't *vcpu_pc(vcpu) the PC of the previous entry for this vcpu?.... > its not the PC of the > exit until __sysreg_save_el2_return_state() saves it, which happens > just after > fixup_guest_exit(). Hmmm. Good point. The move was obviously done in haste, thank you for pointing this blatant bug. > Mess with ELR_EL2 directly? Yes, that's the best course of action. We never run this code anyway. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm