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Tue, 14 Jul 2020 13:23:12 +0100 MIME-Version: 1.0 Date: Tue, 14 Jul 2020 13:23:12 +0100 From: Marc Zyngier To: zhukeqian Subject: Re: [Question] About scaling factor of Enhanced Counter Virtualization In-Reply-To: <0bbe0709-c055-2d97-9a88-814821dd9c2f@huawei.com> References: <0bbe0709-c055-2d97-9a88-814821dd9c2f@huawei.com> User-Agent: Roundcube Webmail/1.4.5 Message-ID: X-Sender: maz@kernel.org X-SA-Exim-Connect-IP: 51.254.78.96 X-SA-Exim-Rcpt-To: zhukeqian1@huawei.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, james.morse@arm.com, catalin.marinas@arm.com, will@kernel.org, suzuki.poulose@arm.com, yebiaoxiang@huawei.com, xiexiangyou@huawei.com, wanghaibin.wang@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Cc: Catalin Marinas , yebiaoxiang@huawei.com, Will Deacon , kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On 2020-07-14 13:15, zhukeqian wrote: > Hi Marc, > > On 2020/7/14 19:34, Marc Zyngier wrote: >> Hi Keqian, >> >> On 2020-07-14 03:20, zhukeqian wrote: >>> Hi all, >>> >>> We are studying Enhanced Counter Virtualization (introduced by >>> ARMv8.6 >>> extension), and here is a question >>> raised by Biaoxiang Ye : >>> >>> Described in the ARMv8.6 Extension Specification: >>> Note: the scaling factor CNTSCALE is designed as a 2.62 bit fixed >>> point number, so permitting a scaling up by >>> (nearly) a factor 4. The scaling factor CNTISCALE is signed as an >>> 8.56 >>> number for the scaling of the values >>> written into the timers for comparison with the actual count. This >>> implies that the greatest scaling down of the >>> counter supported in (nearly) a factor of *512*. >>> >>> We think the number "512" should be "256" (2^8), or do we miss >>> something? >> >> This register doesn't seem to be described in ARM DDI 0487F.b, >> which is the official documentation and does contain the ARMv8.6 >> material, including ARMv8.6-ECV. >> >> Either you are looking at confidential information (and nobody >> can answer you in public), or obsolete information (and nobody >> knows what this is about). >> > Well, it's alpha release version :( . Many thanks! Wow. I suggest you discard this document, as it is obsolete. ARMv8.6 is a released version of the architecture, and everything should be in the ARM ARM. M. -- Jazz is not dead. It just smells funny... _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm