From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4D2AC2D0C2 for ; Fri, 6 Dec 2019 14:14:58 +0000 (UTC) Received: from mm01.cs.columbia.edu (mm01.cs.columbia.edu [128.59.11.253]) by mail.kernel.org (Postfix) with ESMTP id A2B2F2464E for ; Fri, 6 Dec 2019 14:14:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A2B2F2464E Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=kvmarm-bounces@lists.cs.columbia.edu Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 5BF904AF2D; Fri, 6 Dec 2019 09:14:58 -0500 (EST) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IP7DRTVwTPc8; Fri, 6 Dec 2019 09:14:57 -0500 (EST) Received: from mm01.cs.columbia.edu (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 6712B4AF39; Fri, 6 Dec 2019 09:14:57 -0500 (EST) Received: from localhost (localhost [127.0.0.1]) by mm01.cs.columbia.edu (Postfix) with ESMTP id 82B9C4AF2D for ; Fri, 6 Dec 2019 09:14:55 -0500 (EST) X-Virus-Scanned: at lists.cs.columbia.edu Received: from mm01.cs.columbia.edu ([127.0.0.1]) by localhost (mm01.cs.columbia.edu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id gnglnEH8JQjh for ; Fri, 6 Dec 2019 09:14:54 -0500 (EST) Received: from inca-roads.misterjones.org (inca-roads.misterjones.org [213.251.177.50]) by mm01.cs.columbia.edu (Postfix) with ESMTPS id 72F1A4AF15 for ; Fri, 6 Dec 2019 09:14:54 -0500 (EST) Received: from www-data by cheepnis.misterjones.org with local (Exim 4.80) (envelope-from ) id 1idENg-0004EG-0L; Fri, 06 Dec 2019 15:14:52 +0100 To: Peter Maydell Subject: Re: [PATCH v2 3/5] target/arm: Handle trapping to EL2 of AArch32 VMRS instructions X-PHP-Originating-Script: 0:main.inc MIME-Version: 1.0 Date: Fri, 06 Dec 2019 14:14:51 +0000 From: Marc Zyngier In-Reply-To: References: <20191201122018.25808-1-maz@kernel.org> <20191201122018.25808-4-maz@kernel.org> Message-ID: X-Sender: maz@kernel.org User-Agent: Roundcube Webmail/0.7.2 X-SA-Exim-Connect-IP: X-SA-Exim-Rcpt-To: peter.maydell@linaro.org, qemu-devel@nongnu.org, kvmarm@lists.cs.columbia.edu, richard.henderson@linaro.org, edgar.iglesias@xilinx.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on cheepnis.misterjones.org); SAEximRunCond expanded to false Cc: "Edgar E. Iglesias" , Richard Henderson , QEMU Developers , kvmarm@lists.cs.columbia.edu X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 Precedence: list List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On 2019-12-06 14:08, Peter Maydell wrote: > On Sun, 1 Dec 2019 at 12:20, Marc Zyngier wrote: >> >> HCR_EL2.TID3 requires that AArch32 reads of MVFR[012] are trapped to >> EL2, and HCR_EL2.TID0 does the same for reads of FPSID. >> In order to handle this, introduce a new TCG helper function that >> checks for these control bits before executing the VMRC instruction. >> >> Tested with a hacked-up version of KVM/arm64 that sets the control >> bits for 32bit guests. >> >> Reviewed-by: Edgar E. Iglesias >> Signed-off-by: Marc Zyngier >> --- >> target/arm/helper-a64.h | 2 ++ >> target/arm/translate-vfp.inc.c | 18 +++++++++++++++--- >> target/arm/vfp_helper.c | 29 +++++++++++++++++++++++++++++ >> 3 files changed, 46 insertions(+), 3 deletions(-) >> >> diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h >> index a915c1247f..0af44dc814 100644 >> --- a/target/arm/helper-a64.h >> +++ b/target/arm/helper-a64.h >> @@ -102,3 +102,5 @@ DEF_HELPER_FLAGS_3(autda, TCG_CALL_NO_WG, i64, >> env, i64, i64) >> DEF_HELPER_FLAGS_3(autdb, TCG_CALL_NO_WG, i64, env, i64, i64) >> DEF_HELPER_FLAGS_2(xpaci, TCG_CALL_NO_RWG_SE, i64, env, i64) >> DEF_HELPER_FLAGS_2(xpacd, TCG_CALL_NO_RWG_SE, i64, env, i64) >> + >> +DEF_HELPER_3(check_hcr_el2_trap, void, env, i32, i32) > > This has to be in helper.h, not helper-a64.h, otherwise > the arm-softmmu target won't build. helper-a64.h is for > helper functions which only exist in the aarch64 binary. Ah, fair enough. I guess I should build all targets rather than limit myself to aarch64... I'll fix that and repost the series, having hopefully addressed Richard's comments. Thanks, M. -- Jazz is not dead. It just smells funny... _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm