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Fri, 6 Sep 2019 14:12:56 +0000 (UTC) Received: from EX13D20UWC001.ant.amazon.com (10.43.162.244) by EX13MTAUWC001.ant.amazon.com (10.43.162.135) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Fri, 6 Sep 2019 14:12:56 +0000 Received: from 38f9d3867b82.ant.amazon.com (10.43.162.242) by EX13D20UWC001.ant.amazon.com (10.43.162.244) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Fri, 6 Sep 2019 14:12:53 +0000 Subject: Re: [PATCH 1/1] KVM: inject data abort if instruction cannot be decoded To: Peter Maydell References: <20190904180736.29009-1-xypron.glpk@gmx.de> <86r24vrwyh.wl-maz@kernel.org> <86mufjrup7.wl-maz@kernel.org> <20190905092223.GC4320@e113682-lin.lund.arm.com> <4b6662bd-56e4-3c10-3b65-7c90828a22f9@kernel.org> <20190906080033.GF4320@e113682-lin.lund.arm.com> <20190906131252.GG4320@e113682-lin.lund.arm.com> <28c5c021-7cb0-616b-4215-dd75242c16e6@amazon.com> From: Alexander Graf Message-ID: Date: Fri, 6 Sep 2019 16:12:51 +0200 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.14; rv:60.0) Gecko/20100101 Thunderbird/60.8.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-Originating-IP: [10.43.162.242] X-ClientProxiedBy: EX13D18UWC003.ant.amazon.com (10.43.162.237) To EX13D20UWC001.ant.amazon.com (10.43.162.244) Precedence: Bulk Cc: =?UTF-8?Q?Daniel_P=2e_Berrang=c3=a9?= , Heinrich Schuchardt , lkml - Kernel Mailing List , Stefan Hajnoczi , Marc Zyngier , kvmarm@lists.cs.columbia.edu, arm-mail-list X-BeenThere: kvmarm@lists.cs.columbia.edu X-Mailman-Version: 2.1.14 List-Id: Where KVM/ARM decisions are made List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Errors-To: kvmarm-bounces@lists.cs.columbia.edu Sender: kvmarm-bounces@lists.cs.columbia.edu On 06.09.19 15:50, Peter Maydell wrote: > On Fri, 6 Sep 2019 at 14:41, Alexander Graf wrote: >> On 06.09.19 15:31, Peter Maydell wrote: >>> (b) we try to reuse the code we already have that does TCG exception >>> injection, which might or might not be a design mistake, and >> >> That's probably a design mistake, correct :) > > Well, conceptually it's not necessarily a bad idea, because > in both cases what we're doing is "change the system register > state (PC, ESR_EL1, ELR_EL1 etc) so that the CPU looks like > it's just taken an exception"; but some of what the > TCG code needs to do isn't necessary for KVM and all of it > was not written with the idea of KVM in mind at all... Yes, and it probably makes sense to model the QEMU internal API similarly, so that exception generating code does not have to distinguish. However, it's much easier for KVM to ensure exception prioritization as well as internal state synchronization. Conceptually, as you've seen, it really doesn't make a lot of sense to pull register state from KVM, wiggle it and then push it down when KVM has awareness of the same transformation anyway. So I guess the path is clear: Create a generic interface for exception injection and a separate patch similar to what Christoffer already posted with the new CAP to route illegal MMIO traps into user space. Connecting the two dots in user space really should be trivial then. (famous last words) Alex Amazon Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Ralf Herbrich Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B Sitz: Berlin Ust-ID: DE 289 237 879 _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm