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* [PATCH v2 0/2] PCI: Power management improvements
@ 2019-06-12 10:57 Mika Westerberg
  2019-06-12 10:57 ` [PATCH v2 1/2] PCI: Add missing link delays required by the PCIe spec Mika Westerberg
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Mika Westerberg @ 2019-06-12 10:57 UTC (permalink / raw)
  To: Bjorn Helgaas, Rafael J. Wysocki
  Cc: Len Brown, Lukas Wunner, Keith Busch, Alex Williamson,
	Alexandru Gagniuc, Mika Westerberg, linux-acpi, linux-pci

Hi all,

This series includes a couple of changes to the PCI power management that
should make Linux follow the PCIe spec better. The issues this series aims
to solve came up with Intel Ice Lake Thunderbolt enabling where the
controller is first time integrated into the SoC but I think these issues
are generic to any platform having similar configuration.

Changes from v1

  * I dropped the last patch as it requires bit more work and not dependent
    on the other two. I will send it out separately.
  * Re-arranged conditionals in wait_for_downstream_link()
  * Moved comments to be part of kernel-doc
  * Added tags from Rafael and Lukas

Previous version is here:

  https://www.spinics.net/lists/linux-pci/msg83582.html

Mika Westerberg (2):
  PCI: Add missing link delays required by the PCIe spec
  PCI: Do not poll for PME if the device is in D3cold

 drivers/pci/pci.c               | 36 +++++++++++++-----
 drivers/pci/pci.h               |  1 +
 drivers/pci/pcie/portdrv_core.c | 66 +++++++++++++++++++++++++++++++++
 3 files changed, 93 insertions(+), 10 deletions(-)

-- 
2.20.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

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Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2019-06-12 10:57 [PATCH v2 0/2] PCI: Power management improvements Mika Westerberg
2019-06-12 10:57 ` [PATCH v2 1/2] PCI: Add missing link delays required by the PCIe spec Mika Westerberg
2019-06-12 10:57 ` [PATCH v2 2/2] PCI: Do not poll for PME if the device is in D3cold Mika Westerberg
2019-06-17 10:43 ` [PATCH v2 0/2] PCI: Power management improvements Rafael J. Wysocki

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