From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D69BAC46499 for ; Fri, 5 Jul 2019 11:24:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id ADC4621852 for ; Fri, 5 Jul 2019 11:24:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726549AbfGELYa (ORCPT ); Fri, 5 Jul 2019 07:24:30 -0400 Received: from mga06.intel.com ([134.134.136.31]:52406 "EHLO mga06.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726523AbfGELY3 (ORCPT ); Fri, 5 Jul 2019 07:24:29 -0400 X-Amp-Result: UNSCANNABLE X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jul 2019 04:24:28 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,454,1557212400"; d="scan'208";a="185155552" Received: from lahna.fi.intel.com (HELO lahna) ([10.237.72.157]) by fmsmga001.fm.intel.com with SMTP; 05 Jul 2019 04:24:25 -0700 Received: by lahna (sSMTP sendmail emulation); Fri, 05 Jul 2019 14:24:24 +0300 Date: Fri, 5 Jul 2019 14:24:24 +0300 From: Mika Westerberg To: Yehezkel Bernat Cc: LKML , Andreas Noever , Michael Jamet , "Rafael J . Wysocki" , Len Brown , Lukas Wunner , Mario Limonciello , Anthony Wong , linux-acpi@vger.kernel.org Subject: Re: [PATCH 3/8] thunderbolt: Use 32-bit writes when writing ring producer/consumer Message-ID: <20190705112424.GW2640@lahna.fi.intel.com> References: <20190705095800.43534-1-mika.westerberg@linux.intel.com> <20190705095800.43534-4-mika.westerberg@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.11.4 (2019-03-13) Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org On Fri, Jul 05, 2019 at 02:09:44PM +0300, Yehezkel Bernat wrote: > On Fri, Jul 5, 2019 at 12:58 PM Mika Westerberg > wrote: > > > > The register access should be using 32-bit reads/writes according to the > > datasheet. With the previous generation hardware 16-bit writes have been > > working but starting with ICL this is not the case anymore so fix > > producer/consumer register update to use correct width register address. > > > > Signed-off-by: Mika Westerberg > > --- > > drivers/thunderbolt/nhi.c | 26 ++++++++++++++++++++++---- > > 1 file changed, 22 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/thunderbolt/nhi.c b/drivers/thunderbolt/nhi.c > > index 27fbe62c7ddd..09242653da67 100644 > > --- a/drivers/thunderbolt/nhi.c > > +++ b/drivers/thunderbolt/nhi.c > > @@ -143,9 +143,24 @@ static void __iomem *ring_options_base(struct tb_ring *ring) > > return io; > > } > > > > -static void ring_iowrite16desc(struct tb_ring *ring, u32 value, u32 offset) > > +static void ring_iowrite_prod(struct tb_ring *ring, u16 prod) > > { > > - iowrite16(value, ring_desc_base(ring) + offset); > > + u32 val; > > + > > + val = ioread32(ring_desc_base(ring) + 8); > > + val &= 0x0000ffff; > > + val |= prod << 16; > > + iowrite32(val, ring_desc_base(ring) + 8); > > +} > > + > > +static void ring_iowrite_cons(struct tb_ring *ring, u16 cons) > > +{ > > + u32 val; > > + > > + val = ioread32(ring_desc_base(ring) + 8); > > + val &= 0xffff0000; > > + val |= cons; > > + iowrite32(val, ring_desc_base(ring) + 8); > > } > > > > static void ring_iowrite32desc(struct tb_ring *ring, u32 value, u32 offset) > > @@ -197,7 +212,10 @@ static void ring_write_descriptors(struct tb_ring *ring) > > descriptor->sof = frame->sof; > > } > > ring->head = (ring->head + 1) % ring->size; > > - ring_iowrite16desc(ring, ring->head, ring->is_tx ? 10 : 8); > > + if (ring->is_tx) > > + ring_iowrite_prod(ring, ring->head); > > + else > > + ring_iowrite_cons(ring, ring->head); > > Really a matter of taste, but maybe you want to consider having a single > function, with a 3rd parameter, bool is_tx. > The calls here will be unified to: > ring_iowrite(ring, ring->head, ring->is_tx); > (No condition is needed here). I like the idea. We could even make it ring_iowrite_prod_cons(ring); and then use ring->head and ring->is_tx inside.