From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1F633CA9EA0 for ; Fri, 25 Oct 2019 07:47:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E6AB821929 for ; Fri, 25 Oct 2019 07:47:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437166AbfJYHrl (ORCPT ); Fri, 25 Oct 2019 03:47:41 -0400 Received: from mga07.intel.com ([134.134.136.100]:33872 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727275AbfJYHrl (ORCPT ); Fri, 25 Oct 2019 03:47:41 -0400 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Oct 2019 00:47:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,227,1569308400"; d="scan'208";a="201737589" Received: from smile.fi.intel.com (HELO smile) ([10.237.68.40]) by orsmga003.jf.intel.com with ESMTP; 25 Oct 2019 00:47:38 -0700 Received: from andy by smile with local (Exim 4.92.2) (envelope-from ) id 1iNuJt-0001d3-PY; Fri, 25 Oct 2019 10:47:37 +0300 Date: Fri, 25 Oct 2019 10:47:37 +0300 From: Andy Shevchenko To: Hans de Goede Cc: "Rafael J . Wysocki" , Len Brown , Lee Jones , Mika Westerberg , linux-acpi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 4/4] mfd: intel_soc_pmic_crc: Add "cht_crystal_cove_pmic" cell to CHT cells Message-ID: <20191025074737.GA32742@smile.fi.intel.com> References: <20191024213827.144974-1-hdegoede@redhat.com> <20191024213827.144974-5-hdegoede@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191024213827.144974-5-hdegoede@redhat.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-acpi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org On Thu, Oct 24, 2019 at 11:38:27PM +0200, Hans de Goede wrote: > Add a "cht_crystal_cove_pmic" cell to the cells for the Cherry Trail > variant of the Crystal Cove PMIC. Adding this cell enables / hooks-up > the new Cherry Trail Crystal Cove PMIC OpRegion driver. > The code below is fine, although same wondering about naming scheme for PWM / GPIO. Reviewed-by: Andy Shevchenko > Signed-off-by: Hans de Goede > --- > drivers/mfd/intel_soc_pmic_crc.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/mfd/intel_soc_pmic_crc.c b/drivers/mfd/intel_soc_pmic_crc.c > index ab09b8225b76..429efa1f8e55 100644 > --- a/drivers/mfd/intel_soc_pmic_crc.c > +++ b/drivers/mfd/intel_soc_pmic_crc.c > @@ -88,6 +88,9 @@ static struct mfd_cell crystal_cove_cht_dev[] = { > .num_resources = ARRAY_SIZE(gpio_resources), > .resources = gpio_resources, > }, > + { > + .name = "cht_crystal_cove_pmic", > + }, > { > .name = "crystal_cove_pwm", > }, > -- > 2.23.0 > -- With Best Regards, Andy Shevchenko