From: Jonathan Cameron <jonathan.cameron@huawei.com> To: Jean-Philippe Brucker <jean-philippe@linaro.org> Cc: <iommu@lists.linux-foundation.org>, <devicetree@vger.kernel.org>, <linux-acpi@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <joro@8bytes.org>, <robh+dt@kernel.org>, <mark.rutland@arm.com>, <lorenzo.pieralisi@arm.com>, <guohanjun@huawei.com>, <sudeep.holla@arm.com>, <rjw@rjwysocki.net>, <lenb@kernel.org>, <will@kernel.org>, <robin.murphy@arm.com>, <zhangfei.gao@linaro.org>, <eric.auger@redhat.com> Subject: Re: [PATCH v2 8/8] iommu/arm-smmu-v3: Add support for PCI PASID Date: Mon, 11 Nov 2019 16:05:29 +0000 Message-ID: <20191111160529.00006dcd@huawei.com> (raw) In-Reply-To: <20191108152508.4039168-9-jean-philippe@linaro.org> On Fri, 8 Nov 2019 16:25:08 +0100 Jean-Philippe Brucker <jean-philippe@linaro.org> wrote: > Enable PASID for PCI devices that support it. Since the SSID tables are > allocated by arm_smmu_attach_dev(), PASID has to be enabled early enough. > arm_smmu_dev_feature_enable() would be too late, since by that time the > main DMA domain has already been attached. Do it in add_device() instead. > > Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org> Seems straightforward. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Thanks for working on this stuff. I hope we an move to get the rest of the SVA elements lined up behind it so everything moves quickly in the next cycle (or two). Jonathan > --- > drivers/iommu/arm-smmu-v3.c | 51 ++++++++++++++++++++++++++++++++++++- > 1 file changed, 50 insertions(+), 1 deletion(-) > > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c > index 88ec0bf33492..3ee313c08325 100644 > --- a/drivers/iommu/arm-smmu-v3.c > +++ b/drivers/iommu/arm-smmu-v3.c > @@ -2633,6 +2633,49 @@ static void arm_smmu_disable_ats(struct arm_smmu_master *master) > atomic_dec(&smmu_domain->nr_ats_masters); > } > > +static int arm_smmu_enable_pasid(struct arm_smmu_master *master) > +{ > + int ret; > + int features; > + int num_pasids; > + struct pci_dev *pdev; > + > + if (!dev_is_pci(master->dev)) > + return -ENOSYS; > + > + pdev = to_pci_dev(master->dev); > + > + features = pci_pasid_features(pdev); > + if (features < 0) > + return -ENOSYS; > + > + num_pasids = pci_max_pasids(pdev); > + if (num_pasids <= 0) > + return -ENOSYS; > + > + ret = pci_enable_pasid(pdev, features); > + if (!ret) > + master->ssid_bits = min_t(u8, ilog2(num_pasids), > + master->smmu->ssid_bits); > + return ret; > +} > + > +static void arm_smmu_disable_pasid(struct arm_smmu_master *master) > +{ > + struct pci_dev *pdev; > + > + if (!dev_is_pci(master->dev)) > + return; > + > + pdev = to_pci_dev(master->dev); > + > + if (!pdev->pasid_enabled) > + return; > + > + master->ssid_bits = 0; > + pci_disable_pasid(pdev); > +} > + > static void arm_smmu_detach_dev(struct arm_smmu_master *master) > { > unsigned long flags; > @@ -2841,13 +2884,16 @@ static int arm_smmu_add_device(struct device *dev) > > master->ssid_bits = min(smmu->ssid_bits, fwspec->num_pasid_bits); > > + /* Note that PASID must be enabled before, and disabled after ATS */ > + arm_smmu_enable_pasid(master); > + > if (!(smmu->features & ARM_SMMU_FEAT_2_LVL_CDTAB)) > master->ssid_bits = min_t(u8, master->ssid_bits, > CTXDESC_LINEAR_CDMAX); > > ret = iommu_device_link(&smmu->iommu, dev); > if (ret) > - goto err_free_master; > + goto err_disable_pasid; > > group = iommu_group_get_for_dev(dev); > if (IS_ERR(group)) { > @@ -2860,6 +2906,8 @@ static int arm_smmu_add_device(struct device *dev) > > err_unlink: > iommu_device_unlink(&smmu->iommu, dev); > +err_disable_pasid: > + arm_smmu_disable_pasid(master); > err_free_master: > kfree(master); > fwspec->iommu_priv = NULL; > @@ -2880,6 +2928,7 @@ static void arm_smmu_remove_device(struct device *dev) > arm_smmu_detach_dev(master); > iommu_group_remove_device(dev); > iommu_device_unlink(&smmu->iommu, dev); > + arm_smmu_disable_pasid(master); > kfree(master); > iommu_fwspec_free(dev); > }
next prev parent reply index Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-08 15:25 [PATCH v2 0/8] iommu: Add PASID support to Arm SMMUv3 Jean-Philippe Brucker 2019-11-08 15:25 ` [PATCH v2 1/8] dt-bindings: document PASID property for IOMMU masters Jean-Philippe Brucker 2019-11-08 15:25 ` [PATCH v2 2/8] iommu/arm-smmu-v3: Support platform SSID Jean-Philippe Brucker 2019-11-08 15:25 ` [PATCH v2 3/8] ACPI/IORT: Support PASID for platform devices Jean-Philippe Brucker 2019-11-14 6:42 ` Hanjun Guo 2019-11-08 15:25 ` [PATCH v2 4/8] iommu/arm-smmu-v3: Prepare for SSID support Jean-Philippe Brucker 2019-11-11 14:38 ` Jonathan Cameron 2019-11-22 15:28 ` Jean-Philippe Brucker 2019-11-08 15:25 ` [PATCH v2 5/8] iommu/arm-smmu-v3: Add support for Substream IDs Jean-Philippe Brucker 2019-11-11 15:12 ` Jonathan Cameron 2019-11-08 15:25 ` [PATCH v2 6/8] iommu/arm-smmu-v3: Add second level of context descriptor table Jean-Philippe Brucker 2019-11-11 15:50 ` Jonathan Cameron 2019-11-22 15:32 ` Jean-Philippe Brucker 2019-11-08 15:25 ` [PATCH v2 7/8] iommu/arm-smmu-v3: Improve add_device() error handling Jean-Philippe Brucker 2019-11-11 15:58 ` Jonathan Cameron 2019-11-08 15:25 ` [PATCH v2 8/8] iommu/arm-smmu-v3: Add support for PCI PASID Jean-Philippe Brucker 2019-11-11 16:05 ` Jonathan Cameron [this message] 2019-11-22 15:33 ` Jean-Philippe Brucker 2019-11-12 10:02 ` [PATCH v2 0/8] iommu: Add PASID support to Arm SMMUv3 zhangfei
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