From: Bjorn Helgaas <helgaas@kernel.org>
To: Shiju Jose <shiju.jose@huawei.com>
Cc: linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org,
linux-kernel@vger.kernel.org, rjw@rjwysocki.net, bp@alien8.de,
james.morse@arm.com, lenb@kernel.org, tony.luck@intel.com,
dan.carpenter@oracle.com, zhangliguang@linux.alibaba.com,
andriy.shevchenko@linux.intel.com, wangkefeng.wang@huawei.com,
jroedel@suse.de, yangyicong@hisilicon.com,
jonathan.cameron@huawei.com, tanxiaofei@huawei.com
Subject: Re: [PATCH v9 2/2] PCI: hip: Add handling of HiSilicon HIP PCIe controller errors
Date: Tue, 16 Jun 2020 18:20:19 -0500 [thread overview]
Message-ID: <20200616232019.GA1987909@bjorn-Precision-5520> (raw)
In-Reply-To: <20200615101552.802-3-shiju.jose@huawei.com>
On Mon, Jun 15, 2020 at 11:15:52AM +0100, Shiju Jose wrote:
> From: Yicong Yang <yangyicong@hisilicon.com>
>
> The HiSilicon HIP PCIe controller is capable of handling errors
> on root port and perform port reset separately at each root port.
>
> Add error handling driver for HIP PCIe controller to log
> and report recoverable errors. Perform root port reset and restore
> link status after the recovery.
>
> Following are some of the PCIe controller's recoverable errors
> 1. completion transmission timeout error.
> 2. CRS retry counter over the threshold error.
> 3. ECC 2 bit errors
> 4. AXI bresponse/rresponse errors etc.
> +static int hisi_pcie_notify_error(struct notifier_block *nb,
> + unsigned long event, void *data)
> +{
> + struct acpi_hest_generic_data *gdata = data;
> + const struct hisi_pcie_error_data *error_data =
> + acpi_hest_get_payload(gdata);
> + struct hisi_pcie_error_private *priv =
> + container_of(nb, struct hisi_pcie_error_private, nb);
> + struct platform_device *pdev = priv->pdev;
> + struct device *dev = &pdev->dev;
> + u8 socket;
> +
> + if (device_property_read_u8(dev, "socket", &socket))
> + return NOTIFY_DONE;
> +
> + if (!guid_equal((guid_t *)gdata->section_type, &hisi_pcie_sec_type) ||
> + error_data->socket_id != socket)
> + return NOTIFY_DONE;
I think you have to verify the GUID first before you can even safely
extract a struct hisi_pcie_error_private from the payload:
if (!guid_equal(...))
return NOTIFY_DONE;
priv = container_of(nb, struct hisi_pcie_error_private, nb);
pdev = priv->pdev;
dev = &pdev->dev;
if (device_property_read_u8(dev, "socket", &socket))
return NOTIFY_DONE;
if (error_data->socket_id != socket)
return NOTIFY_DONE;
> + hisi_pcie_handle_error(pdev, error_data);
> +
> + return NOTIFY_OK;
> +}
next prev parent reply other threads:[~2020-06-16 23:20 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-15 10:15 [PATCH v9 2/2] PCI: hip: Add handling of HiSilicon HIP PCIe controller errors Shiju Jose
2020-06-15 12:00 ` Andy Shevchenko
2020-06-16 9:12 ` Shiju Jose
2020-06-16 9:30 ` Andy Shevchenko
2020-06-16 11:55 ` Shiju Jose
2020-06-16 12:41 ` Andy Shevchenko
2020-06-16 12:46 ` Shiju Jose
2020-06-16 23:20 ` Bjorn Helgaas [this message]
2020-06-17 9:01 ` Andy Shevchenko
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