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Date:   Tue, 29 Sep 2020 16:32:39 +0200
From:   Andrew Lunn <andrew@lunn.ch>
To:     Andy Shevchenko <andy.shevchenko@gmail.com>
Cc:     Calvin Johnson <calvin.johnson@oss.nxp.com>,
        Grant Likely <grant.likely@arm.com>,
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Subject: Re: [net-next PATCH v7 1/6] Documentation: ACPI: DSD: Document MDIO
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On Tue, Sep 29, 2020 at 04:55:40PM +0300, Andy Shevchenko wrote:
> On Tue, Sep 29, 2020 at 4:43 PM Andrew Lunn <andrew@lunn.ch> wrote:
> > On Tue, Sep 29, 2020 at 10:47:03AM +0530, Calvin Johnson wrote:
> > > On Fri, Sep 25, 2020 at 02:34:21PM +0100, Grant Likely wrote:
> 
> ...
> 
> > Newbie ACPI question: Does ACPI even support big endian CPUs, given
> > its x86 origins?
> 
> I understand the newbie part, but can you elaborate what did you mean
> under 'support'?
> To me it sounds like 'network stack was developed for BE CPUs, does it
> support LE ones?'

Does ACPI define the endianness of its tables? Is it written in the
standard that they should be little endian?  Does Tianocore, or any
other implementations, have the needed le32_to_cpu() calls so that
they can boot on a big endian CPU? Does it have a standardized way of
saying a device is big endian, swap words around if appropriate when
doing IO?

Is it feasible to boot an ARM system big endian? Can i boot the same
system little endian? The CPU should be able to do it, but are the
needed things in the ACPI specification and implementation to allow
it?

	Andrew