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Wysocki" , , , CC: , Randy Dunlap , Stephen Rothwell , Giovanni Gherdovich , Alex Deucher , "Deepak Sharma" , Jinzhou Su , Perry Yuan , Jassmine Meng , Huang Rui Subject: [PATCH 2/4] x86, sched: Move AMD maximum frequency ratio setting function into x86 CPPC Date: Mon, 14 Feb 2022 18:14:48 +0800 Message-ID: <20220214101450.356047-3-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220214101450.356047-1-ray.huang@amd.com> References: <20220214101450.356047-1-ray.huang@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 7c4133ca-e670-4b48-78a6-08d9efa2e702 X-MS-TrafficTypeDiagnostic: MN2PR12MB2974:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: LQ0opLGkJMYd3UibTSHFag4QSqObOriRfeERmq92exhqS9J2U3UsNCXTuDiIZB5Db5SFjfHOWk/lhrEa1GKD9/qKoHxT/zYP7QSuUtA3ppNe+N4/EuzwU08sSsk7NdvU2K5HL5GXHZd/bjMQ0E800M8OscFk8Upo0YP9wv7FcVWIxONQ56W/AqioEekhBM/p8qGw0k86HmwMGMUqUqouHviEY7hoHu7VQIffm3geQOtG4sKa9QdoJAJRuwkyZePxRT4hvxC0uOsHcljwyEYq+xwhEgbbcycOWm44mHLd/HIWPlaJ14N3psyOXmB28xi3owKKHj0lZ5bXpnFRjc0EWTOgH4bK14rdFJ6CCyS6zp0lpxgIuh55doKXmQkUTZLtF4yrVT4tW6uklrEZRjqJ5cTmML2+Utsf3T3FGm3f3WowDY/3IVSZ/IUMCa7XFHoK30wyK2exVizr4dCoSAL+F3czE/vfwhbAZPEO+NXNmrddWghuhL4jdnlWMwze59fN4GE2G9ekFQC1lbM06tlhV4Is2ykkAww7lxfMIsctVSlh+svm8iMioyOjrajBP+h7yvdfzUgTtwtGVcuV2gOOxArTdrYkzufodndrWpcYf3eSYcAVtgbqfa15r9O9ld66n8zdTFBSs31Q6Wr1fLjR1liivqnsLQqCzLDfbJ5thzjW+e7ZsAURcHID9NjI9LNeuow493wTOAveOhnJQLfT+w== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230001)(4636009)(36840700001)(40470700004)(46966006)(82310400004)(356005)(316002)(110136005)(81166007)(2906002)(54906003)(8936002)(4326008)(8676002)(6666004)(70586007)(70206006)(5660300002)(86362001)(26005)(186003)(1076003)(36756003)(2616005)(16526019)(336012)(426003)(47076005)(7696005)(83380400001)(36860700001)(508600001)(40460700003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Feb 2022 10:15:18.8293 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7c4133ca-e670-4b48-78a6-08d9efa2e702 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT017.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB2974 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org The AMD maximum frequency ratio setting function depends on CPPC, so the x86 CPPC implementation file is better space for this function. Signed-off-by: Huang Rui --- arch/x86/include/asm/topology.h | 9 +++++++ arch/x86/kernel/acpi/cppc.c | 40 ++++++++++++++++++++++++++++++ arch/x86/kernel/smpboot.c | 44 +-------------------------------- 3 files changed, 50 insertions(+), 43 deletions(-) diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h index 2f0b6be8eaab..168ade7d4007 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -226,4 +226,13 @@ void init_freq_invariance_cppc(void); #define init_freq_invariance_cppc init_freq_invariance_cppc #endif +#ifdef CONFIG_ACPI_CPPC_LIB +bool amd_set_max_freq_ratio(u64 *ratio); +#else +static inline bool amd_set_max_freq_ratio(u64 *ratio) +{ + return false; +} +#endif + #endif /* _ASM_X86_TOPOLOGY_H */ diff --git a/arch/x86/kernel/acpi/cppc.c b/arch/x86/kernel/acpi/cppc.c index 08d823d72586..f0be5058e3e3 100644 --- a/arch/x86/kernel/acpi/cppc.c +++ b/arch/x86/kernel/acpi/cppc.c @@ -6,6 +6,8 @@ #include #include +#include +#include /* Refer to drivers/acpi/cppc_acpi.c for the description of functions */ @@ -47,3 +49,41 @@ int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val) } return err; } + +bool amd_set_max_freq_ratio(u64 *ratio) +{ + struct cppc_perf_caps perf_caps; + u64 highest_perf, nominal_perf; + u64 perf_ratio; + int rc; + + if (!ratio) + return false; + + rc = cppc_get_perf_caps(0, &perf_caps); + if (rc) { + pr_debug("Could not retrieve perf counters (%d)\n", rc); + return false; + } + + highest_perf = amd_get_highest_perf(); + nominal_perf = perf_caps.nominal_perf; + + if (!highest_perf || !nominal_perf) { + pr_debug("Could not retrieve highest or nominal performance\n"); + return false; + } + + perf_ratio = div_u64(highest_perf * SCHED_CAPACITY_SCALE, nominal_perf); + /* midpoint between max_boost and max_P */ + perf_ratio = (perf_ratio + SCHED_CAPACITY_SCALE) >> 1; + if (!perf_ratio) { + pr_debug("Non-zero highest/nominal perf values led to a 0 ratio\n"); + return false; + } + + *ratio = perf_ratio; + arch_set_max_freq_ratio(false); + + return true; +} diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 617012f4619f..0718cc7649a4 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -2097,48 +2097,6 @@ static bool intel_set_max_freq_ratio(void) return true; } -#ifdef CONFIG_ACPI_CPPC_LIB -static bool amd_set_max_freq_ratio(void) -{ - struct cppc_perf_caps perf_caps; - u64 highest_perf, nominal_perf; - u64 perf_ratio; - int rc; - - rc = cppc_get_perf_caps(0, &perf_caps); - if (rc) { - pr_debug("Could not retrieve perf counters (%d)\n", rc); - return false; - } - - highest_perf = amd_get_highest_perf(); - nominal_perf = perf_caps.nominal_perf; - - if (!highest_perf || !nominal_perf) { - pr_debug("Could not retrieve highest or nominal performance\n"); - return false; - } - - perf_ratio = div_u64(highest_perf * SCHED_CAPACITY_SCALE, nominal_perf); - /* midpoint between max_boost and max_P */ - perf_ratio = (perf_ratio + SCHED_CAPACITY_SCALE) >> 1; - if (!perf_ratio) { - pr_debug("Non-zero highest/nominal perf values led to a 0 ratio\n"); - return false; - } - - arch_turbo_freq_ratio = perf_ratio; - arch_set_max_freq_ratio(false); - - return true; -} -#else -static bool amd_set_max_freq_ratio(void) -{ - return false; -} -#endif - static void init_counter_refs(void) { u64 aperf, mperf; @@ -2187,7 +2145,7 @@ static void init_freq_invariance(bool secondary, bool cppc_ready) if (!cppc_ready) { return; } - ret = amd_set_max_freq_ratio(); + ret = amd_set_max_freq_ratio(&arch_turbo_freq_ratio); } if (ret) { -- 2.25.1