From: Huang Rui <ray.huang@amd.com>
To: Borislav Petkov <bp@alien8.de>,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
<linux-pm@vger.kernel.org>, <linux-acpi@vger.kernel.org>,
<x86@kernel.org>
Cc: <linux-kernel@vger.kernel.org>,
Randy Dunlap <rdunlap@infradead.org>,
Stephen Rothwell <sfr@canb.auug.org.au>,
Giovanni Gherdovich <ggherdovich@suse.cz>,
Alex Deucher <alexander.deucher@amd.com>,
"Deepak Sharma" <deepak.sharma@amd.com>,
Jinzhou Su <Jinzhou.Su@amd.com>, Perry Yuan <Perry.Yuan@amd.com>,
Jassmine Meng <li.meng@amd.com>, Huang Rui <ray.huang@amd.com>
Subject: [PATCH 3/4] x86, sched: Expose init_freq_invariance to topology header
Date: Mon, 14 Feb 2022 18:14:49 +0800 [thread overview]
Message-ID: <20220214101450.356047-4-ray.huang@amd.com> (raw)
In-Reply-To: <20220214101450.356047-1-ray.huang@amd.com>
The function init_freq_invariance will be used on x86 CPPC, so expose it in
the topology header.
Signed-off-by: Huang Rui <ray.huang@amd.com>
---
arch/x86/include/asm/topology.h | 4 ++++
arch/x86/kernel/smpboot.c | 8 +-------
2 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topology.h
index 168ade7d4007..c35005a03768 100644
--- a/arch/x86/include/asm/topology.h
+++ b/arch/x86/include/asm/topology.h
@@ -215,10 +215,14 @@ extern void arch_scale_freq_tick(void);
#define arch_scale_freq_tick arch_scale_freq_tick
extern void arch_set_max_freq_ratio(bool turbo_disabled);
+void init_freq_invariance(bool secondary, bool cppc_ready);
#else
static inline void arch_set_max_freq_ratio(bool turbo_disabled)
{
}
+static inline void init_freq_invariance(bool secondary, bool cppc_ready)
+{
+}
#endif
#if defined(CONFIG_ACPI_CPPC_LIB) && defined(CONFIG_SMP)
diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
index 0718cc7649a4..8f2ff9be0fcc 100644
--- a/arch/x86/kernel/smpboot.c
+++ b/arch/x86/kernel/smpboot.c
@@ -155,8 +155,6 @@ static inline void smpboot_restore_warm_reset_vector(void)
*((volatile u32 *)phys_to_virt(TRAMPOLINE_PHYS_LOW)) = 0;
}
-static void init_freq_invariance(bool secondary, bool cppc_ready);
-
/*
* Report back to the Boot Processor during boot time or to the caller processor
* during CPU online.
@@ -2125,7 +2123,7 @@ static void register_freq_invariance_syscore_ops(void)
static inline void register_freq_invariance_syscore_ops(void) {}
#endif
-static void init_freq_invariance(bool secondary, bool cppc_ready)
+void init_freq_invariance(bool secondary, bool cppc_ready)
{
bool ret = false;
@@ -2222,8 +2220,4 @@ void arch_scale_freq_tick(void)
pr_warn("Scheduler frequency invariance went wobbly, disabling!\n");
schedule_work(&disable_freq_invariance_work);
}
-#else
-static inline void init_freq_invariance(bool secondary, bool cppc_ready)
-{
-}
#endif /* CONFIG_X86_64 */
--
2.25.1
next prev parent reply other threads:[~2022-02-14 10:51 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-14 10:14 [PATCH 0/4] x86/acpi/cppc: Minor clean up for x86 CPPC implementation Huang Rui
2022-02-14 10:14 ` [PATCH 1/4] x86/acpi: Expand the CPPC MSR file to cover the whole " Huang Rui
2022-02-14 10:14 ` [PATCH 2/4] x86, sched: Move AMD maximum frequency ratio setting function into x86 CPPC Huang Rui
2022-02-14 10:14 ` Huang Rui [this message]
2022-02-14 10:14 ` [PATCH 4/4] x86/acpi: Move init_freq_invariance_cppc " Huang Rui
2022-03-01 19:20 ` [PATCH 0/4] x86/acpi/cppc: Minor clean up for x86 CPPC implementation Rafael J. Wysocki
2022-03-08 18:18 ` Rafael J. Wysocki
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