From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E860AFA373D for ; Mon, 24 Oct 2022 22:50:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232120AbiJXWuL (ORCPT ); Mon, 24 Oct 2022 18:50:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231490AbiJXWtp (ORCPT ); Mon, 24 Oct 2022 18:49:45 -0400 Received: from cloudserver094114.home.pl (cloudserver094114.home.pl [79.96.170.134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4934049B6C; Mon, 24 Oct 2022 14:11:34 -0700 (PDT) Received: from localhost (127.0.0.1) (HELO v370.home.net.pl) by /usr/run/smtp (/usr/run/postfix/private/idea_relay_lmtp) via UNIX with SMTP (IdeaSmtpServer 5.0.0) id 696992e5b47a83ad; Mon, 24 Oct 2022 21:23:37 +0200 Received: from kreacher.localnet (unknown [213.134.163.181]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by v370.home.net.pl (Postfix) with ESMTPSA id BBC446692BC; Mon, 24 Oct 2022 21:23:36 +0200 (CEST) From: "Rafael J. Wysocki" To: Linux PM Cc: LKML , Len Brown , Srinivas Pandruvada , Linux ACPI Subject: [PATCH 0/2] cpufreq: intel_pstate: Make HWP calibration work on all hybrid platforms Date: Mon, 24 Oct 2022 21:18:19 +0200 Message-ID: <2258064.ElGaqSPkdT@kreacher> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="UTF-8" X-CLIENT-IP: 213.134.163.181 X-CLIENT-HOSTNAME: 213.134.163.181 X-VADE-SPAMSTATE: clean X-VADE-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedvfedrgedtgedgudefudcutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfjqffogffrnfdpggftiffpkfenuceurghilhhouhhtmecuudehtdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvvefufffkggfgtgesthfuredttddtjeenucfhrhhomhepfdftrghfrggvlhculfdrucghhihsohgtkhhifdcuoehrjhifsehrjhifhihsohgtkhhirdhnvghtqeenucggtffrrghtthgvrhhnpeffffffkefgheehffelteeiveeffeevhfelteejvddvieejjeelvdeiheeuveeuffenucfkphepvddufedrudefgedrudeifedrudekudenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepihhnvghtpedvudefrddufeegrdduieefrddukedupdhhvghlohepkhhrvggrtghhvghrrdhlohgtrghlnhgvthdpmhgrihhlfhhrohhmpedftfgrfhgrvghlucflrdcuhgihshhotghkihdfuceorhhjfiesrhhjfiihshhotghkihdrnhgvtheqpdhnsggprhgtphhtthhopeehpdhrtghpthhtoheplhhinhhugidqphhmsehvghgvrhdrkhgvrhhnvghlrdhorhhgpdhrtghpthhtoheplhhinhhugidqkhgvrhhnvghlsehvghgvrhdrkhgvrhhnvghlrdhorhhgpdhrtghpthhtoheplhgvnhdrsghrohifnhesihhnthgvlhdrtghomhdprhgtphhtthhopehsrhhinhhivhgrshdrphgrnhgurhhuvhgruggrsehlihhnuhigrdhinhhtvghlrdgt ohhmpdhrtghpthhtoheplhhinhhugidqrggtphhisehvghgvrhdrkhgvrhhnvghlrdhorhhg X-DCC--Metrics: v370.home.net.pl 1024; Body=5 Fuz1=5 Fuz2=5 Precedence: bulk List-ID: X-Mailing-List: linux-acpi@vger.kernel.org Hi All, The HWP calibration in intel_pstate is needed to map HWP performance levels to frequencies, which are used in the cpufreq sysfs interface, in a reliable way. On all non-hybrid "core" platforms it is sufficient to multiply the HWP performance levels by 100000 to obtain the corresponding frequencies, but on hybrid ones there is a difference between P-cores and E-cores. Previous attempts to make this work were based on using CPPC (and in particular the nominal performance values provided by _CPC), but it turns out that the CPPC information is not sufficiently reliable for this purpose and the only way to do it is to use a hard-coded scaling factors for P-cores and for E-cores (which fortunately is the same as in the non-hybrid case). Fortunately, the same scaling factor for P-cores works on all of the hybrid platforms to date. The first patch in the series ensures that all of the CPUs will use correct information from MSRs by avoiding the situations in which an MSR values read on one CPU will be used for performance scaling of another CPU. The second one implements the approach outlined above. Please see the changelogs for details. Thanks!