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From: David Laight <David.Laight@ACULAB.COM>
To: 'Mika Westerberg' <mika.westerberg@linux.intel.com>
Cc: 'Yehezkel Bernat' <yehezkelshb@gmail.com>,
	LKML <linux-kernel@vger.kernel.org>,
	Andreas Noever <andreas.noever@gmail.com>,
	Michael Jamet <michael.jamet@intel.com>,
	"Rafael J . Wysocki" <rjw@rjwysocki.net>,
	Len Brown <lenb@kernel.org>, Lukas Wunner <lukas@wunner.de>,
	Mario Limonciello <Mario.Limonciello@dell.com>,
	"Anthony Wong" <anthony.wong@canonical.com>,
	"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>
Subject: RE: [PATCH 3/8] thunderbolt: Use 32-bit writes when writing ring producer/consumer
Date: Wed, 7 Aug 2019 16:41:30 +0000	[thread overview]
Message-ID: <91a579eb2f614739a9a1177bdde5513e@AcuMS.aculab.com> (raw)
In-Reply-To: <20190807163629.GV2716@lahna.fi.intel.com>

From: 'Mika Westerberg' [mailto:mika.westerberg@linux.intel.com]
> Sent: 07 August 2019 17:36
> 
> On Wed, Aug 07, 2019 at 04:22:26PM +0000, David Laight wrote:
> > From: Mika Westerberg
> > > Sent: 07 August 2019 17:14
> > > To: David Laight
> > >
> > > On Fri, Jul 05, 2019 at 04:04:19PM +0000, David Laight wrote:
> > > > > Really a matter of taste, but maybe you want to consider having a single
> > > > > function, with a 3rd parameter, bool is_tx.
> > > > > The calls here will be unified to:
> > > > >         ring_iowrite(ring, ring->head, ring->is_tx);
> > > > > (No condition is needed here).
> > > > >
> > > > > The implementation uses the new parameter to decide which part of the register
> > > > > to mask, reducing the code duplication (in my eyes):
> > > > >
> > > > >         val = ioread32(ring_desc_base(ring) + 8);
> > > > >         if (is_tx) {
> > > > >                 val &= 0x0000ffff;
> > > > >                 val |= value << 16;
> > > > >         } else {
> > > > >                 val &= 0xffff0000;
> > > > >                 val |= value;
> > > > >         }
> > > > >         iowrite32(val, ring_desc_base(ring) + 8);
> > > > >
> > > > > I'm not sure if it improves the readability or makes it worse. Your call.
> > > >
> > > > Gah, that is all horrid beyond belief.
> > > > If a 32bit write is valid then the hardware must not be updating
> > > > the other 16 bits.
> > > > In which case the driver knows what they should be.
> > > > So it can do a single 32bit write of the required value.
> > >
> > > I'm not entirely sure I understand what you say above. Can you shed some
> > > light on this by a concrete example how it should look like? :-)
> >
> > The driver must know both the tx and rx ring values, so:
> > 	iowrite32(tx_val << 16 | rx_val, ring_desc_base(ring) + 8);
> >
> 
> I see. However, prod or cons side gets updated by the hardware as it
> processes buffers and other side is only updated by the driver. I'm not
> sure the above works here.

If the hardware updates the other half of the 32bit word it doesn't ever work.
In that case you must do 16bit writes.
If the hardware is ignoring the byte-enables it is broken and unusable.

	David

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Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK
Registration No: 1397386 (Wales)


  reply	other threads:[~2019-08-07 16:41 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-05  9:57 [PATCH 0/8] thunderbolt: Intel Ice Lake support Mika Westerberg
2019-07-05  9:57 ` [PATCH 1/8] thunderbolt: Correct path indices for PCIe tunnel Mika Westerberg
2019-07-05  9:57 ` [PATCH 2/8] thunderbolt: Move NVM upgrade support flag to struct icm Mika Westerberg
2019-07-05 10:52   ` Yehezkel Bernat
2019-07-05 10:58     ` Mika Westerberg
2019-07-09 15:11       ` Mario.Limonciello
2019-08-05 13:15         ` Mika Westerberg
2019-07-05  9:57 ` [PATCH 3/8] thunderbolt: Use 32-bit writes when writing ring producer/consumer Mika Westerberg
2019-07-05 11:09   ` Yehezkel Bernat
2019-07-05 11:24     ` Mika Westerberg
2019-07-05 16:04     ` David Laight
2019-08-07 16:13       ` Mika Westerberg
2019-08-07 16:22         ` David Laight
2019-08-07 16:36           ` 'Mika Westerberg'
2019-08-07 16:41             ` David Laight [this message]
2019-08-08  9:57               ` 'Mika Westerberg'
2019-08-12  9:01                 ` David Laight
2019-07-05  9:57 ` [PATCH 4/8] thunderbolt: Do not fail adding switch if some port is not implemented Mika Westerberg
2019-07-05  9:57 ` [PATCH 5/8] thunderbolt: Hide switch attributes that are not set Mika Westerberg
2019-07-05  9:57 ` [PATCH 6/8] thunderbolt: Expose active parts of NVM even if upgrade is not supported Mika Westerberg
2019-07-05  9:57 ` [PATCH 7/8] thunderbolt: Add support for Intel Ice Lake Mika Westerberg
2019-07-05 14:44   ` Yehezkel Bernat
2019-07-05 14:51     ` Mika Westerberg
2019-07-05 15:02       ` Yehezkel Bernat
2019-08-04 18:25   ` Lukas Wunner
2019-08-05 14:16     ` Mika Westerberg
2019-07-05  9:58 ` [PATCH 8/8] ACPI / property: Add two new Thunderbolt property GUIDs to the list Mika Westerberg
2019-07-09  8:18   ` Rafael J. Wysocki
2019-07-05 10:33 ` [PATCH 0/8] thunderbolt: Intel Ice Lake support Mika Westerberg
2019-07-05 14:56   ` Yehezkel Bernat

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