Re: [PATCH v3 04/17] PCI: Do not override delay for D0->D3hot transition

["Rafael J. Wysocki" <rafael@kernel.org>]

On Tue, Mar 3, 2020 at 2:30 PM Stanislav Spassov <stanspas@amazon.com> wrote:
>
> From: Stanislav Spassov <stanspas@amazon.de>
>
> Both specifications that document mechanisms for overriding the
> D3hot->D0 waiting time only speak of this specific direction.
> Nothing is mentioned about the opposite (D*->D3hot) except for
> the default value of 10ms in PCI Express Base Specification
> r5.0 (May 22, 2019), Section 5.9 "State Transition Recovery Time
> Requirements".

Unless you have a specific example of a system on which the current
code doesn't work (and which should be mentioned here), I don't think
that it is a good idea to make this change.

There are systems in which it would make a measurable difference in
things like the time it takes to suspend the system.

> Signed-off-by: Stanislav Spassov <stanspas@amazon.de>
> ---
>  drivers/pci/pci.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index c1a866f733e9..03103bb15b42 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -4589,7 +4589,7 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
>         csr &= ~PCI_PM_CTRL_STATE_MASK;
>         csr |= PCI_D3hot;
>         pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);
> -       pci_dev_d3_sleep(dev);
> +       msleep(PCI_PM_D3_WAIT);
>
>         csr &= ~PCI_PM_CTRL_STATE_MASK;
>         csr |= PCI_D0;
> --
> 2.25.1
>
>
>
>
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