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From: Jianxin Pan <jianxin.pan@amlogic.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: devicetree@vger.kernel.org, Hanjie Lin <hanjie.lin@amlogic.com>,
	Victor Wan <victor.wan@amlogic.com>,
	Neil Armstrong <narmstrong@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	linux-kernel@vger.kernel.org,
	Qiufang Dai <qiufang.dai@amlogic.com>,
	Rob Herring <robh+dt@kernel.org>, Jian Hu <jian.hu@amlogic.com>,
	Xingyu Chen <xingyu.chen@amlogic.com>,
	Tao Zeng <tao.zeng@amlogic.com>, Carlo Caione <carlo@caione.org>,
	linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCH v2 4/4] arm64: dts: add support for A1 based Amlogic AD401
Date: Wed, 11 Sep 2019 15:37:02 +0800	[thread overview]
Message-ID: <09d7f5cc-9063-28f4-b68f-79f21fca500b@amlogic.com> (raw)
In-Reply-To: <CAFBinCAJG4=M3BSXfREGU+iadMPkc7=yt3AdcqA1KAhQx6Wh9w@mail.gmail.com>

Hi Martin,

On 2019/9/10 1:24, Martin Blumenstingl wrote:
> Hi Jianxin,
> 
> On Mon, Sep 9, 2019 at 2:03 PM Jianxin Pan <jianxin.pan@amlogic.com> wrote:
>>
>> Hi Martin,
>>
>> On 2019/9/7 23:02, Martin Blumenstingl wrote:
>>> Hi Jianxin,
>>>
>>> On Fri, Sep 6, 2019 at 7:58 AM Jianxin Pan <jianxin.pan@amlogic.com> wrote:
>>> [...]
>>>>> also I'm a bit surprised to see no busses (like aobus, cbus, periphs, ...) here
>>>>> aren't there any busses defined in the A1 SoC implementation or are
>>>>> were you planning to add them later?
>>>> Unlike previous series,there is no Cortex-M3 AO CPU in A1, and there is no AO/EE power domain.
>>>> Most of the registers are on the apb_32b bus.  aobus, cbus and periphs are not used in A1.
>>> OK, thank you for the explanation
>>> since you're going to re-send the patch anyways: can you please
>>> include the apb_32b bus?
>>> all other upstream Amlogic .dts are using the bus definitions, so that
>>> will make A1 consistent with the other SoCs
>> In A1 (and the later C1), BUS is not mentioned in the memmap and register spec.
>> Registers are organized and grouped by functions, and we can not find information about buses from the SoC document.
> do you know why the busses are not part of the documentation?
> 
>> Maybe it's better to remove bus definitions for these chips.
> my understanding is that devicetree describes the hardware
> so if there's a bus in hardware (that we know about) then we should
> describe it in devicetree
> 
> personally I think busses also make the .dts easier to read:
> instead of a huge .dts with all nodes on one level it's split into
> multiple smaller sub-nodes - thus making it easier to keep track of
> "where am I in this file".
> 
OK, I will add the bus description for A1.
Thank you for your suggestion.
> 
> Martin
> 
> .
> 


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      reply	other threads:[~2019-09-11  7:37 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-05  7:07 [PATCH v2 0/4] arm64: Add basic support for Amlogic A1 SoC Family Jianxin Pan
2019-09-05  7:07 ` [PATCH v2 1/4] soc: amlogic: meson-gx-socinfo: Add A1 and A113L IDs Jianxin Pan
2019-09-05  7:07 ` [PATCH v2 2/4] dt-bindings: arm: amlogic: add A1 bindings Jianxin Pan
2019-09-05  7:07 ` [PATCH v2 3/4] dt-bindings: arm: amlogic: add Amlogic AD401 bindings Jianxin Pan
2019-09-05  7:07 ` [PATCH v2 4/4] arm64: dts: add support for A1 based Amlogic AD401 Jianxin Pan
2019-09-05 20:15   ` Martin Blumenstingl
2019-09-06  5:59     ` Jianxin Pan
2019-09-07 15:02       ` Martin Blumenstingl
2019-09-09 11:36         ` Jerome Brunet
2019-09-09 16:12           ` Jianxin Pan
2019-09-09 12:04         ` Jianxin Pan
2019-09-09 17:24           ` Martin Blumenstingl
2019-09-11  7:37             ` Jianxin Pan [this message]

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