* [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1
@ 2020-07-19 17:32 Martin Blumenstingl
2020-07-19 17:32 ` [PATCH v2 1/3] arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS Martin Blumenstingl
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Martin Blumenstingl @ 2020-07-19 17:32 UTC (permalink / raw)
To: linux-amlogic, khilman
Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel, narmstrong
Now that we have GPU DVFS support in lima [0] (in Linux 5.7) and
panfrost we can make it work on Amlogic SoCs.
I decided to remove code duplication for the Mali-450 GPU on GXBB and
GXL so it will be easier to maintain this. This refactoring is part of
patch #1. Patches #2 (GXM) and #3 (G12A, G12B, SM1) are straight
forward; it replaces the hardcoded clock settings with the the GPU OPP
table.
I used the userspace devfreq governor to cycle through all available
GPU frequency settings on GXL, GXM and G12A (which covers all relevant
GPU driver and clock driver combinations). I have taken the GPU OPP
tables from Amlogic's 4.9 vendor kernel and the voltage settings
(opp-microvolt property) from the public dataseheets for all SoCs.
Changes since v1 at [1]:
- removed the clock patches from this series as they are already
applied (in Linux 5.8)
- rebased on top of Neil's recent patch "arm64: dts: meson-gxl-s805x:
reduce initial Mali450 core frequency"
- adapted patch #1 after Neil's GXL S805X patch to keep the 744MHz OPP
disabled on that package
- added a comment about GP0_PLL (as to why it's needed) to all patch
descriptions
- removed RFC prefix
[0] https://cgit.freedesktop.org/drm-misc/commit/?id=1996970773a323533e1cc1b6b97f00a95d675f32
[1] https://patchwork.kernel.org/cover/11466399/
Martin Blumenstingl (3):
arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS
arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS
arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS
.../boot/dts/amlogic/meson-g12-common.dtsi | 49 ++++++++++-----
.../boot/dts/amlogic/meson-gx-mali450.dtsi | 61 +++++++++++++++++++
arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 51 ++++------------
.../boot/dts/amlogic/meson-gxl-mali.dtsi | 46 +++-----------
.../boot/dts/amlogic/meson-gxl-s805x.dtsi | 17 +++---
arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 45 +++++++++-----
6 files changed, 153 insertions(+), 116 deletions(-)
create mode 100644 arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi
--
2.27.0
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^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH v2 1/3] arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS 2020-07-19 17:32 [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Martin Blumenstingl @ 2020-07-19 17:32 ` Martin Blumenstingl 2020-07-19 17:32 ` [PATCH v2 2/3] arm64: dts: amlogic: meson-gxm: add the Mali " Martin Blumenstingl ` (3 subsequent siblings) 4 siblings, 0 replies; 6+ messages in thread From: Martin Blumenstingl @ 2020-07-19 17:32 UTC (permalink / raw) To: linux-amlogic, khilman Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel, narmstrong Add the OPP table for the Mali-450 GPU and drop the hardcoded initial clock configuration. This enables GPU DVFS and thus saves power when the GPU is not in use while still being able switch to a higher clock on demand. Set the GP0_PLL clock to 744MHz (which is the only frequency which cannot be derived from the FCLK dividers) as the clock driver avoids setting the parent clock rates so the MPLL clocks aren't changed (as these are reserved for audio). The only exception to this is the GXL S805X package because the 744MHz OPP isn't working correctly there. While here, make most of meson-gxl-mali re-usable to reduce the amount of duplicate code between GXBB and GXL. This is more important now as we don't want to duplicate the GPU OPP table. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- .../boot/dts/amlogic/meson-gx-mali450.dtsi | 61 +++++++++++++++++++ arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 51 ++++------------ .../boot/dts/amlogic/meson-gxl-mali.dtsi | 46 +++----------- .../boot/dts/amlogic/meson-gxl-s805x.dtsi | 17 +++--- 4 files changed, 89 insertions(+), 86 deletions(-) create mode 100644 arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi diff --git a/arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi b/arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi new file mode 100644 index 000000000000..f9771b51c852 --- /dev/null +++ b/arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2017 BayLibre SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +/ { + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-125000000 { + opp-hz = /bits/ 64 <125000000>; + opp-microvolt = <950000>; + }; + opp-250000000 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <950000>; + }; + opp-285714285 { + opp-hz = /bits/ 64 <285714285>; + opp-microvolt = <950000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <950000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <950000>; + }; + opp-666666666 { + opp-hz = /bits/ 64 <666666666>; + opp-microvolt = <950000>; + }; + opp-744000000 { + opp-hz = /bits/ 64 <744000000>; + opp-microvolt = <950000>; + }; + }; +}; + +&apb { + mali: gpu@c0000 { + compatible = "arm,mali-450"; + reg = <0x0 0xc0000 0x0 0x40000>; + interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "gp", "gpmmu", "pp", "pmu", + "pp0", "ppmmu0", "pp1", "ppmmu1", + "pp2", "ppmmu2"; + operating-points-v2 = <&gpu_opp_table>; + }; +}; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index ea50dd434887..7c029f552a23 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -4,6 +4,7 @@ */ #include "meson-gx.dtsi" +#include "meson-gx-mali450.dtsi" #include <dt-bindings/gpio/meson-gxbb-gpio.h> #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> #include <dt-bindings/clock/gxbb-clkc.h> @@ -264,46 +265,6 @@ mux { }; }; -&apb { - mali: gpu@c0000 { - compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; - reg = <0x0 0xc0000 0x0 0x40000>; - interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gp", "gpmmu", "pp", "pmu", - "pp0", "ppmmu0", "pp1", "ppmmu1", - "pp2", "ppmmu2"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; - clock-names = "bus", "core"; - - /* - * Mali clocking is provided by two identical clock paths - * MALI_0 and MALI_1 muxed to a single clock by a glitch - * free mux to safely change frequency while running. - */ - assigned-clocks = <&clkc CLKID_GP0_PLL>, - <&clkc CLKID_MALI_0_SEL>, - <&clkc CLKID_MALI_0>, - <&clkc CLKID_MALI>; /* Glitch free mux */ - assigned-clock-parents = <0>, /* Do Nothing */ - <&clkc CLKID_GP0_PLL>, - <0>, /* Do Nothing */ - <&clkc CLKID_MALI_0>; - assigned-clock-rates = <744000000>, - <0>, /* Do Nothing */ - <744000000>, - <0>; /* Do Nothing */ - }; -}; - &cbus { spifc: spi@8c80 { compatible = "amlogic,meson-gxbb-spifc"; @@ -386,6 +347,16 @@ &i2c_C { clocks = <&clkc CLKID_I2C>; }; +&mali { + compatible = "amlogic,meson-gxbb-mali", "arm,mali-450"; + + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + + assigned-clocks = <&clkc CLKID_GP0_PLL>; + assigned-clock-rates = <744000000>; +}; + &periphs { pinctrl_periphs: pinctrl@4b0 { compatible = "amlogic,meson-gxbb-periphs-pinctrl"; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi index 6aaafff674f9..478e755cc87c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi @@ -4,42 +4,14 @@ * Author: Neil Armstrong <narmstrong@baylibre.com> */ -&apb { - mali: gpu@c0000 { - compatible = "amlogic,meson-gxl-mali", "arm,mali-450"; - reg = <0x0 0xc0000 0x0 0x40000>; - interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gp", "gpmmu", "pp", "pmu", - "pp0", "ppmmu0", "pp1", "ppmmu1", - "pp2", "ppmmu2"; - clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; - clock-names = "bus", "core"; +#include "meson-gx-mali450.dtsi" - /* - * Mali clocking is provided by two identical clock paths - * MALI_0 and MALI_1 muxed to a single clock by a glitch - * free mux to safely change frequency while running. - */ - assigned-clocks = <&clkc CLKID_GP0_PLL>, - <&clkc CLKID_MALI_0_SEL>, - <&clkc CLKID_MALI_0>, - <&clkc CLKID_MALI>; /* Glitch free mux */ - assigned-clock-parents = <0>, /* Do Nothing */ - <&clkc CLKID_GP0_PLL>, - <0>, /* Do Nothing */ - <&clkc CLKID_MALI_0>; - assigned-clock-rates = <744000000>, - <0>, /* Do Nothing */ - <744000000>, - <0>; /* Do Nothing */ - }; +&mali { + compatible = "amlogic,meson-gxl-mali", "arm,mali-450"; + + clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>; + clock-names = "bus", "core"; + + assigned-clocks = <&clkc CLKID_GP0_PLL>; + assigned-clock-rates = <744000000>; }; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi index f9d705648426..29975849822c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi @@ -11,14 +11,13 @@ / { }; /* The S805X Package doesn't seem to handle the 744MHz OPP correctly */ +&gpu_opp_table { + opp-744000000 { + status = "disabled"; + }; +}; + &mali { - assigned-clocks = <&clkc CLKID_MALI_0_SEL>, - <&clkc CLKID_MALI_0>, - <&clkc CLKID_MALI>; /* Glitch free mux */ - assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, - <0>, /* Do Nothing */ - <&clkc CLKID_MALI_0>; - assigned-clock-rates = <0>, /* Do Nothing */ - <666666666>, - <0>; /* Do Nothing */ + /delete-property/ assigned-clocks; + /delete-property/ assigned-clock-rates; }; -- 2.27.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 2/3] arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS 2020-07-19 17:32 [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Martin Blumenstingl 2020-07-19 17:32 ` [PATCH v2 1/3] arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS Martin Blumenstingl @ 2020-07-19 17:32 ` Martin Blumenstingl 2020-07-19 17:32 ` [PATCH v2 3/3] arm64: dts: amlogic: meson-g12: " Martin Blumenstingl ` (2 subsequent siblings) 4 siblings, 0 replies; 6+ messages in thread From: Martin Blumenstingl @ 2020-07-19 17:32 UTC (permalink / raw) To: linux-amlogic, khilman Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel, narmstrong Add the OPP table for the Mali-T820 GPU and drop the hardcoded initial clock configuration. This enables GPU DVFS and thus saves power when the GPU is not in use while still being able switch to a higher clock on demand. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 45 ++++++++++++++-------- 1 file changed, 30 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi index 40e3e123e05b..fe4145112295 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi @@ -82,6 +82,35 @@ cpu7: cpu@103 { #cooling-cells = <2>; }; }; + + gpu_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-125000000 { + opp-hz = /bits/ 64 <125000000>; + opp-microvolt = <950000>; + }; + opp-250000000 { + opp-hz = /bits/ 64 <250000000>; + opp-microvolt = <950000>; + }; + opp-285714285 { + opp-hz = /bits/ 64 <285714285>; + opp-microvolt = <950000>; + }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <950000>; + }; + opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <950000>; + }; + opp-666666666 { + opp-hz = /bits/ 64 <666666666>; + opp-microvolt = <950000>; + }; + }; }; &apb { @@ -106,21 +135,7 @@ mali: gpu@c0000 { interrupt-names = "job", "mmu", "gpu"; clocks = <&clkc CLKID_MALI>; resets = <&reset RESET_MALI_CAPB3>, <&reset RESET_MALI>; - - /* - * Mali clocking is provided by two identical clock paths - * MALI_0 and MALI_1 muxed to a single clock by a glitch - * free mux to safely change frequency while running. - */ - assigned-clocks = <&clkc CLKID_MALI_0_SEL>, - <&clkc CLKID_MALI_0>, - <&clkc CLKID_MALI>; /* Glitch free mux */ - assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>, - <0>, /* Do Nothing */ - <&clkc CLKID_MALI_0>; - assigned-clock-rates = <0>, /* Do Nothing */ - <666666666>, - <0>; /* Do Nothing */ + operating-points-v2 = <&gpu_opp_table>; }; }; -- 2.27.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v2 3/3] arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS 2020-07-19 17:32 [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Martin Blumenstingl 2020-07-19 17:32 ` [PATCH v2 1/3] arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS Martin Blumenstingl 2020-07-19 17:32 ` [PATCH v2 2/3] arm64: dts: amlogic: meson-gxm: add the Mali " Martin Blumenstingl @ 2020-07-19 17:32 ` Martin Blumenstingl 2020-07-21 21:14 ` [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Kevin Hilman 2020-07-21 21:21 ` patchwork-bot+linux-amlogic 4 siblings, 0 replies; 6+ messages in thread From: Martin Blumenstingl @ 2020-07-19 17:32 UTC (permalink / raw) To: linux-amlogic, khilman Cc: Martin Blumenstingl, linux-kernel, linux-arm-kernel, narmstrong Add the OPP table for the Mali Bifrost GPU and drop the hardcoded initial clock configuration. This enables GPU DVFS and thus saves power when the GPU is not in use while still being able switch to a higher clock on demand. Set the GP0_PLL clock to 744MHz (which is the only frequency which cannot be derived from the FCLK dividers) as the clock driver avoids setting the parent clock rates so the HIFI PLL clock isn't changed (as that's reserved for audio). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- .../boot/dts/amlogic/meson-g12-common.dtsi | 49 +++++++++++++------ 1 file changed, 34 insertions(+), 15 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 41805f2ed8fc..1e83ec5b8c91 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -52,6 +52,39 @@ efuse: efuse { secure-monitor = <&sm>; }; + gpu_opp_table: gpu-opp-table { + compatible = "operating-points-v2"; + + opp-124999998 { + opp-hz = /bits/ 64 <124999998>; + opp-microvolt = <800000>; + }; + opp-249999996 { + opp-hz = /bits/ 64 <249999996>; + opp-microvolt = <800000>; + }; + opp-285714281 { + opp-hz = /bits/ 64 <285714281>; + opp-microvolt = <800000>; + }; + opp-399999994 { + opp-hz = /bits/ 64 <399999994>; + opp-microvolt = <800000>; + }; + opp-499999992 { + opp-hz = /bits/ 64 <499999992>; + opp-microvolt = <800000>; + }; + opp-666666656 { + opp-hz = /bits/ 64 <666666656>; + opp-microvolt = <800000>; + }; + opp-799999987 { + opp-hz = /bits/ 64 <799999987>; + opp-microvolt = <800000>; + }; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; @@ -2362,21 +2395,7 @@ mali: gpu@ffe40000 { interrupt-names = "job", "mmu", "gpu"; clocks = <&clkc CLKID_MALI>; resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>; - - /* - * Mali clocking is provided by two identical clock paths - * MALI_0 and MALI_1 muxed to a single clock by a glitch - * free mux to safely change frequency while running. - */ - assigned-clocks = <&clkc CLKID_MALI_0_SEL>, - <&clkc CLKID_MALI_0>, - <&clkc CLKID_MALI>; /* Glitch free mux */ - assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>, - <0>, /* Do Nothing */ - <&clkc CLKID_MALI_0>; - assigned-clock-rates = <0>, /* Do Nothing */ - <800000000>, - <0>; /* Do Nothing */ + operating-points-v2 = <&gpu_opp_table>; #cooling-cells = <2>; }; }; -- 2.27.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 2020-07-19 17:32 [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Martin Blumenstingl ` (2 preceding siblings ...) 2020-07-19 17:32 ` [PATCH v2 3/3] arm64: dts: amlogic: meson-g12: " Martin Blumenstingl @ 2020-07-21 21:14 ` Kevin Hilman 2020-07-21 21:21 ` patchwork-bot+linux-amlogic 4 siblings, 0 replies; 6+ messages in thread From: Kevin Hilman @ 2020-07-21 21:14 UTC (permalink / raw) To: linux-amlogic, Martin Blumenstingl Cc: linux-kernel, linux-arm-kernel, narmstrong On Sun, 19 Jul 2020 19:32:10 +0200, Martin Blumenstingl wrote: > Now that we have GPU DVFS support in lima [0] (in Linux 5.7) and > panfrost we can make it work on Amlogic SoCs. > > I decided to remove code duplication for the Mali-450 GPU on GXBB and > GXL so it will be easier to maintain this. This refactoring is part of > patch #1. Patches #2 (GXM) and #3 (G12A, G12B, SM1) are straight > forward; it replaces the hardcoded clock settings with the the GPU OPP > table. > > [...] Applied, thanks! [1/3] arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS commit: 46ffadc7e658277d7559899d7f641f14a3cfae8c [2/3] arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS commit: 8f16cfabbc0a6c52b114eca2ff8e95bb07949741 [3/3] arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS commit: 916a0edc43f03f86b13fbc9943e5dc936671ea6e Best regards, -- Kevin Hilman <khilman@baylibre.com> _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 2020-07-19 17:32 [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Martin Blumenstingl ` (3 preceding siblings ...) 2020-07-21 21:14 ` [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Kevin Hilman @ 2020-07-21 21:21 ` patchwork-bot+linux-amlogic 4 siblings, 0 replies; 6+ messages in thread From: patchwork-bot+linux-amlogic @ 2020-07-21 21:21 UTC (permalink / raw) To: Martin Blumenstingl; +Cc: linux-amlogic, khilman Hello: This series was applied to khilman/linux-amlogic.git (refs/heads/for-next). On Sun, 19 Jul 2020 19:32:10 +0200 you wrote: > Now that we have GPU DVFS support in lima [0] (in Linux 5.7) and > panfrost we can make it work on Amlogic SoCs. > > I decided to remove code duplication for the Mali-450 GPU on GXBB and > GXL so it will be easier to maintain this. This refactoring is part of > patch #1. Patches #2 (GXM) and #3 (G12A, G12B, SM1) are straight > forward; it replaces the hardcoded clock settings with the the GPU OPP > table. > > [...] Here is a summary with links: - [v2,1/3] arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS https://git.kernel.org/khilman/linux-amlogic/c/46ffadc7e658277d7559899d7f641f14a3cfae8c - [v2,2/3] arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS https://git.kernel.org/khilman/linux-amlogic/c/8f16cfabbc0a6c52b114eca2ff8e95bb07949741 - [v2,3/3] arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS https://git.kernel.org/khilman/linux-amlogic/c/916a0edc43f03f86b13fbc9943e5dc936671ea6e You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.wiki.kernel.org/userdoc/pwbot _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2020-07-21 21:21 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2020-07-19 17:32 [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Martin Blumenstingl 2020-07-19 17:32 ` [PATCH v2 1/3] arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS Martin Blumenstingl 2020-07-19 17:32 ` [PATCH v2 2/3] arm64: dts: amlogic: meson-gxm: add the Mali " Martin Blumenstingl 2020-07-19 17:32 ` [PATCH v2 3/3] arm64: dts: amlogic: meson-g12: " Martin Blumenstingl 2020-07-21 21:14 ` [PATCH v2 0/3] GPU DVFS for Meson GXBB/GXL/GXM/G12A/G12B/SM1 Kevin Hilman 2020-07-21 21:21 ` patchwork-bot+linux-amlogic
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