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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id x6sm26383184wmi.44.2020.01.07.03.03.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jan 2020 03:03:16 -0800 (PST) References: <20191226191224.3785282-1-martin.blumenstingl@googlemail.com> User-agent: mu4e 1.3.3; emacs 26.3 From: Jerome Brunet To: Martin Blumenstingl , linux-amlogic@lists.infradead.org, sboyd@kernel.org Subject: Re: [PATCH v2 0/2] clk: Meson8/8b/8m2: fix the mali clock flags In-reply-to: <20191226191224.3785282-1-martin.blumenstingl@googlemail.com> Date: Tue, 07 Jan 2020 12:03:15 +0100 Message-ID: <1j36crsf4c.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200107_030318_700706_41116157 X-CRM114-Status: GOOD ( 18.99 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-kernel@vger.kernel.org, mturquette@baylibre.com, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, narmstrong@baylibre.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org On Thu 26 Dec 2019 at 20:12, Martin Blumenstingl wrote: > While playing with devfreq support for the lima driver I experienced > sporadic (random) system lockups. It turned out that this was in > certain cases when changing the mali clock. > > The Amlogic vendor GPU platform driver (which is responsible for > changing the clock frequency) uses the following pattern when updating > the mali clock rate: > - at initialization: initialize the two mali_0 and mali_1 clock trees > with a default setting and enable both clocks > - when changing the clock frequency: > -- set HHI_MALI_CLK_CNTL[31] to temporarily use the mali_1 clock output > -- update the mali_0 clock tree (set the mux, divider, etc.) > -- clear HHI_MALI_CLK_CNTL[31] to temporarily use the mali_0 clock > output again > > With the common clock framework we can even do better: > by setting CLK_SET_RATE_PARENT for the mali_0 and mali_1 output gates > we can force the common clock framework to update the "inactive" clock > and then switch to it's output. > > I only tested this patch for a limited time only (approx. 2 hours). > So far I couldn't reproduce the sporadic system lockups with it. > However, broader testing would be great so I would like this to be > applied for -next. > > Changes since v1 at [0]: > - extend the existing comment in patch #1 to describe how the glitch- > free mux works with the CCF > - slightly updated the patch description of patch #1 to clarify that > the "mali_0" or "mali_1" trees must not be changed while running > - add patch #2 to update the clk_set_rate() kerneldoc because we agreed > that clk_set_rate() should do a root-to-leaf update (it does already, > it's just not documented) > > > [0] https://patchwork.kernel.org/cover/11293177/ > > > Martin Blumenstingl (2): > clk: meson: meson8b: make the CCF use the glitch-free "mali" mux > clk: clarify that clk_set_rate() does updates from top to bottom > Applied with Stephen's Ack > drivers/clk/meson/meson8b.c | 11 +++++++---- > include/linux/clk.h | 3 +++ > 2 files changed, 10 insertions(+), 4 deletions(-) _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic