From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BC3F9C43387 for ; Fri, 11 Jan 2019 14:51:08 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 777EC206B6 for ; Fri, 11 Jan 2019 14:51:08 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="gHpUGrYB" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 777EC206B6 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=bootlin.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=18X0mKlCkicyMPFwHJazk3AosOyQOYd0BwCc3q08Bco=; b=gHpUGrYB6pe6BA aozDuNZOZBplzsY6LzXWjMdUQF1hGkWGQBCrmMEetGh2oZ6W2+QIKxhz7SRMFZKBJZ8xWt44T/gvD 4FuAs73fQYARpO7iMNGiDrk4B8e+WylF2fVWVQ/eNINE7Asv+S1JmHkHjb9FYTcUrL4MiJF/PwjbB /DWWaae6pGIGl+y+xvqeNLH59F8SZCVE3k+ywEdaEuxTrpwtvmaIdH4APBcFy+1nFwmALrWvKhzZa eRxk+V3bjcLL1y8tyCIM4koyJoZHp3BdBP6vkUZe6oQ0r9+8CATLmKna9nnqyih9v20yrgVCnYh03 4747hvtTZb017WaF7U6g==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1ghy9F-0000Du-FK; Fri, 11 Jan 2019 14:51:01 +0000 Received: from mail.bootlin.com ([62.4.15.54]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1ghy94-0000Ch-F8; Fri, 11 Jan 2019 14:51:00 +0000 Received: by mail.bootlin.com (Postfix, from userid 110) id 7B9AA209D7; Fri, 11 Jan 2019 15:50:45 +0100 (CET) Received: from localhost (lfbn-1-2078-236.w90-76.abo.wanadoo.fr [90.76.143.236]) by mail.bootlin.com (Postfix) with ESMTPSA id 1D28F209D7; Fri, 11 Jan 2019 15:50:35 +0100 (CET) Date: Fri, 11 Jan 2019 15:50:35 +0100 From: Antoine Tenart To: Rob Herring Subject: Re: [PATCH] arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string Message-ID: <20190111145035.GB8703@kwain> References: <20190109202934.29304-1-robh@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20190109202934.29304-1-robh@kernel.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nishanth Menon , Andrew Lunn , Heiko Stuebner , Maxime Ripard , linux-arm-msm@vger.kernel.org, Liviu Dudau , David Brown , Thierry Reding , Wei Xu , Manivannan Sadhasivam , Mark Rutland , linux-renesas-soc@vger.kernel.org, Lorenzo Pieralisi , arm@kernel.org, linux-rockchip@lists.infradead.org, Kevin Hilman , Gregory Clement , Magnus Damm , Michal Simek , Krzysztof Kozlowski , Jonathan Hunter , linux-samsung-soc@vger.kernel.org, Chen-Yu Tsai , Kukjin Kim , bcm-kernel-feedback-list@broadcom.com, Baolin Wang , Andy Gross , Orson Zhai , Tsahee Zidenberg , devicetree@vger.kernel.org, linux-tegra@vger.kernel.org, Jason Cooper , Antoine Tenart , Ray Jui , Robert Richter , Simon Horman , linux-mediatek@lists.infradead.org, Jayachandran C , Matthias Brugger , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Will Deacon , Scott Branden , Masahiro Yamada , Chunyan Zhang , Chanho Min , Duc Dang , linux-kernel@vger.kernel.org, Tero Kristo , Dinh Nguyen , Jisheng Zhang , Sudeep Holla , Jun Nie , Sebastian Hesselbarth , Shawn Guo , Andreas =?iso-8859-1?Q?F=E4rber?= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hi Rob, On Wed, Jan 09, 2019 at 02:29:34PM -0600, Rob Herring wrote: > The 'arm,armv8' compatible string is only for software models. It adds > little value otherwise and is inconsistently used as a fallback on some > platforms. Remove it from those platforms. > = > This fixes warnings generated by the DT schema. > = > Reported-by: Michal Simek > Cc: Mark Rutland > Cc: Will Deacon > Signed-off-by: Rob Herring > --- > armsoc folks, Please apply directly. > = > Note that there's still a case left in msm8998 that needs a new = > compatible string. > = > Rob > = > arch/arm64/boot/dts/actions/s700.dtsi | 8 +- > arch/arm64/boot/dts/actions/s900.dtsi | 8 +- > arch/arm64/boot/dts/al/alpine-v2.dtsi | 8 +- For Alpine, Acked-by: Antoine Tenart Thanks! Antoine > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 8 +- > arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 8 +- > arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 8 +- > .../boot/dts/altera/socfpga_stratix10.dtsi | 8 +- > arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 8 +- > arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 8 +- > arch/arm64/boot/dts/amlogic/meson-gx.dtsi | 8 +- > arch/arm64/boot/dts/amlogic/meson-gxm.dtsi | 8 +- > arch/arm64/boot/dts/apm/apm-shadowcat.dtsi | 16 +-- > arch/arm64/boot/dts/apm/apm-storm.dtsi | 16 +-- > arch/arm64/boot/dts/arm/juno-r1.dts | 12 +- > arch/arm64/boot/dts/arm/juno-r2.dts | 12 +- > arch/arm64/boot/dts/arm/juno.dts | 12 +- > .../boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts | 4 +- > .../boot/dts/broadcom/northstar2/ns2.dtsi | 8 +- > .../boot/dts/broadcom/stingray/stingray.dtsi | 16 +-- > arch/arm64/boot/dts/cavium/thunder-88xx.dtsi | 96 ++++++------- > arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi | 8 +- > arch/arm64/boot/dts/exynos/exynos5433.dtsi | 16 +-- > arch/arm64/boot/dts/exynos/exynos7.dtsi | 8 +- > arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 16 +-- > arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 16 +-- > arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 16 +-- > arch/arm64/boot/dts/hisilicon/hip05.dtsi | 32 ++--- > arch/arm64/boot/dts/hisilicon/hip06.dtsi | 32 ++--- > arch/arm64/boot/dts/hisilicon/hip07.dtsi | 128 +++++++++--------- > arch/arm64/boot/dts/lg/lg1312.dtsi | 8 +- > arch/arm64/boot/dts/lg/lg1313.dtsi | 8 +- > arch/arm64/boot/dts/marvell/armada-372x.dtsi | 2 +- > arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 +- > .../boot/dts/marvell/armada-ap806-dual.dtsi | 4 +- > .../boot/dts/marvell/armada-ap806-quad.dtsi | 8 +- > .../marvell/armada-ap810-ap0-octa-core.dtsi | 16 +-- > arch/arm64/boot/dts/mediatek/mt7622.dtsi | 4 +- > arch/arm64/boot/dts/nvidia/tegra132.dtsi | 4 +- > arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12 +- > arch/arm64/boot/dts/nvidia/tegra194.dtsi | 16 +-- > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 +- > arch/arm64/boot/dts/qcom/msm8916.dtsi | 8 +- > arch/arm64/boot/dts/qcom/msm8992.dtsi | 2 +- > arch/arm64/boot/dts/qcom/msm8994.dtsi | 2 +- > arch/arm64/boot/dts/realtek/rtd1295.dtsi | 8 +- > arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 12 +- > arch/arm64/boot/dts/renesas/r8a7795.dtsi | 16 +-- > arch/arm64/boot/dts/renesas/r8a7796.dtsi | 12 +- > arch/arm64/boot/dts/renesas/r8a77965.dtsi | 4 +- > arch/arm64/boot/dts/renesas/r8a77970.dtsi | 4 +- > arch/arm64/boot/dts/renesas/r8a77980.dtsi | 8 +- > arch/arm64/boot/dts/renesas/r8a77990.dtsi | 4 +- > arch/arm64/boot/dts/renesas/r8a77995.dtsi | 2 +- > arch/arm64/boot/dts/rockchip/px30.dtsi | 8 +- > arch/arm64/boot/dts/rockchip/rk3328.dtsi | 8 +- > arch/arm64/boot/dts/rockchip/rk3368.dtsi | 16 +-- > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 12 +- > .../boot/dts/socionext/uniphier-ld11.dtsi | 4 +- > .../boot/dts/socionext/uniphier-ld20.dtsi | 8 +- > .../boot/dts/socionext/uniphier-pxs3.dtsi | 8 +- > arch/arm64/boot/dts/sprd/sc9836.dtsi | 8 +- > arch/arm64/boot/dts/sprd/sc9860.dtsi | 16 +-- > arch/arm64/boot/dts/synaptics/as370.dtsi | 8 +- > arch/arm64/boot/dts/synaptics/berlin4ct.dtsi | 8 +- > arch/arm64/boot/dts/ti/k3-am654.dtsi | 8 +- > arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 8 +- > arch/arm64/boot/dts/zte/zx296718.dtsi | 8 +- > 67 files changed, 427 insertions(+), 427 deletions(-) > = > diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/= actions/s700.dtsi > index 192c7b39c8c1..273a1b169efc 100644 > --- a/arch/arm64/boot/dts/actions/s700.dtsi > +++ b/arch/arm64/boot/dts/actions/s700.dtsi > @@ -18,28 +18,28 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > }; > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > }; > = > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > }; > = > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > }; > diff --git a/arch/arm64/boot/dts/actions/s900.dtsi b/arch/arm64/boot/dts/= actions/s900.dtsi > index 491ddccc9038..9e75782b438f 100644 > --- a/arch/arm64/boot/dts/actions/s900.dtsi > +++ b/arch/arm64/boot/dts/actions/s900.dtsi > @@ -18,28 +18,28 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > }; > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > }; > = > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > }; > = > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > }; > diff --git a/arch/arm64/boot/dts/al/alpine-v2.dtsi b/arch/arm64/boot/dts/= al/alpine-v2.dtsi > index 5b7bef684256..d5e7e2bb4e6c 100644 > --- a/arch/arm64/boot/dts/al/alpine-v2.dtsi > +++ b/arch/arm64/boot/dts/al/alpine-v2.dtsi > @@ -47,28 +47,28 @@ > #size-cells =3D <0>; > = > cpu@0 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > device_type =3D "cpu"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > }; > = > cpu@1 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > device_type =3D "cpu"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > }; > = > cpu@2 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > device_type =3D "cpu"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > }; > = > cpu@3 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > device_type =3D "cpu"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/b= oot/dts/allwinner/sun50i-a64.dtsi > index 837a03dee875..1583afd034ae 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -84,7 +84,7 @@ > #size-cells =3D <0>; > = > cpu0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0>; > enable-method =3D "psci"; > @@ -92,7 +92,7 @@ > }; > = > cpu1: cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <1>; > enable-method =3D "psci"; > @@ -100,7 +100,7 @@ > }; > = > cpu2: cpu@2 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <2>; > enable-method =3D "psci"; > @@ -108,7 +108,7 @@ > }; > = > cpu3: cpu@3 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <3>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun50i-h5.dtsi > index c22621b4b8e9..96acafd3a852 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi > @@ -48,28 +48,28 @@ > #size-cells =3D <0>; > = > cpu0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0>; > enable-method =3D "psci"; > }; > = > cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <1>; > enable-method =3D "psci"; > }; > = > cpu@2 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <2>; > enable-method =3D "psci"; > }; > = > cpu@3 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <3>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun50i-h6.dtsi > index d93a7add67e7..48e170a2b141 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi > @@ -22,28 +22,28 @@ > #size-cells =3D <0>; > = > cpu0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0>; > enable-method =3D "psci"; > }; > = > cpu1: cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <1>; > enable-method =3D "psci"; > }; > = > cpu2: cpu@2 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <2>; > enable-method =3D "psci"; > }; > = > cpu3: cpu@3 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <3>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm= 64/boot/dts/altera/socfpga_stratix10.dtsi > index b2c9bb664595..af4d00741644 100644 > --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi > +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi > @@ -42,28 +42,28 @@ > #size-cells =3D <0>; > = > cpu0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > enable-method =3D "psci"; > reg =3D <0x0>; > }; > = > cpu1: cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > enable-method =3D "psci"; > reg =3D <0x1>; > }; > = > cpu2: cpu@2 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > enable-method =3D "psci"; > reg =3D <0x2>; > }; > = > cpu3: cpu@3 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > enable-method =3D "psci"; > reg =3D <0x3>; > diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot= /dts/amlogic/meson-axg.dtsi > index fffd55787981..1b69efabd49a 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi > @@ -68,7 +68,7 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -77,7 +77,7 @@ > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -86,7 +86,7 @@ > = > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -95,7 +95,7 @@ > = > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boo= t/dts/amlogic/meson-g12a.dtsi > index 3b82a975c663..10418e4b048a 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi > @@ -20,7 +20,7 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -28,7 +28,7 @@ > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -36,7 +36,7 @@ > = > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -44,7 +44,7 @@ > = > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > diff --git a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi b/arch/arm64/boot/= dts/amlogic/meson-gx.dtsi > index 44c5c51ff1fa..3b63ead4f4ed 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gx.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-gx.dtsi > @@ -56,7 +56,7 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -65,7 +65,7 @@ > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -74,7 +74,7 @@ > = > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -83,7 +83,7 @@ > = > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > diff --git a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi b/arch/arm64/boot= /dts/amlogic/meson-gxm.dtsi > index 247888d68a3a..ed3a3d5adf31 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-gxm.dtsi > @@ -44,7 +44,7 @@ > = > cpu4: cpu@100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x100>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -53,7 +53,7 @@ > = > cpu5: cpu@101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x101>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -62,7 +62,7 @@ > = > cpu6: cpu@102 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x102>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > @@ -71,7 +71,7 @@ > = > cpu7: cpu@103 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x103>; > enable-method =3D "psci"; > next-level-cache =3D <&l2>; > diff --git a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi b/arch/arm64/boot= /dts/apm/apm-shadowcat.dtsi > index d8ecd1661461..7faea28a37b0 100644 > --- a/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi > +++ b/arch/arm64/boot/dts/apm/apm-shadowcat.dtsi > @@ -21,7 +21,7 @@ > = > cpu@0 { > device_type =3D "cpu"; > - compatible =3D "apm,strega", "arm,armv8"; > + compatible =3D "apm,strega"; > reg =3D <0x0 0x000>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -31,7 +31,7 @@ > }; > cpu@1 { > device_type =3D "cpu"; > - compatible =3D "apm,strega", "arm,armv8"; > + compatible =3D "apm,strega"; > reg =3D <0x0 0x001>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -41,7 +41,7 @@ > }; > cpu@100 { > device_type =3D "cpu"; > - compatible =3D "apm,strega", "arm,armv8"; > + compatible =3D "apm,strega"; > reg =3D <0x0 0x100>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -51,7 +51,7 @@ > }; > cpu@101 { > device_type =3D "cpu"; > - compatible =3D "apm,strega", "arm,armv8"; > + compatible =3D "apm,strega"; > reg =3D <0x0 0x101>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -61,7 +61,7 @@ > }; > cpu@200 { > device_type =3D "cpu"; > - compatible =3D "apm,strega", "arm,armv8"; > + compatible =3D "apm,strega"; > reg =3D <0x0 0x200>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -71,7 +71,7 @@ > }; > cpu@201 { > device_type =3D "cpu"; > - compatible =3D "apm,strega", "arm,armv8"; > + compatible =3D "apm,strega"; > reg =3D <0x0 0x201>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -81,7 +81,7 @@ > }; > cpu@300 { > device_type =3D "cpu"; > - compatible =3D "apm,strega", "arm,armv8"; > + compatible =3D "apm,strega"; > reg =3D <0x0 0x300>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -91,7 +91,7 @@ > }; > cpu@301 { > device_type =3D "cpu"; > - compatible =3D "apm,strega", "arm,armv8"; > + compatible =3D "apm,strega"; > reg =3D <0x0 0x301>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts= /apm/apm-storm.dtsi > index 00e82b8e9a19..94d637d17262 100644 > --- a/arch/arm64/boot/dts/apm/apm-storm.dtsi > +++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi > @@ -21,7 +21,7 @@ > = > cpu@0 { > device_type =3D "cpu"; > - compatible =3D "apm,potenza", "arm,armv8"; > + compatible =3D "apm,potenza"; > reg =3D <0x0 0x000>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -29,7 +29,7 @@ > }; > cpu@1 { > device_type =3D "cpu"; > - compatible =3D "apm,potenza", "arm,armv8"; > + compatible =3D "apm,potenza"; > reg =3D <0x0 0x001>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -37,7 +37,7 @@ > }; > cpu@100 { > device_type =3D "cpu"; > - compatible =3D "apm,potenza", "arm,armv8"; > + compatible =3D "apm,potenza"; > reg =3D <0x0 0x100>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -45,7 +45,7 @@ > }; > cpu@101 { > device_type =3D "cpu"; > - compatible =3D "apm,potenza", "arm,armv8"; > + compatible =3D "apm,potenza"; > reg =3D <0x0 0x101>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -53,7 +53,7 @@ > }; > cpu@200 { > device_type =3D "cpu"; > - compatible =3D "apm,potenza", "arm,armv8"; > + compatible =3D "apm,potenza"; > reg =3D <0x0 0x200>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -61,7 +61,7 @@ > }; > cpu@201 { > device_type =3D "cpu"; > - compatible =3D "apm,potenza", "arm,armv8"; > + compatible =3D "apm,potenza"; > reg =3D <0x0 0x201>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -69,7 +69,7 @@ > }; > cpu@300 { > device_type =3D "cpu"; > - compatible =3D "apm,potenza", "arm,armv8"; > + compatible =3D "apm,potenza"; > reg =3D <0x0 0x300>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > @@ -77,7 +77,7 @@ > }; > cpu@301 { > device_type =3D "cpu"; > - compatible =3D "apm,potenza", "arm,armv8"; > + compatible =3D "apm,potenza"; > reg =3D <0x0 0x301>; > enable-method =3D "spin-table"; > cpu-release-addr =3D <0x1 0x0000fff8>; > diff --git a/arch/arm64/boot/dts/arm/juno-r1.dts b/arch/arm64/boot/dts/ar= m/juno-r1.dts > index b2b7ced633cf..5f290090b0cf 100644 > --- a/arch/arm64/boot/dts/arm/juno-r1.dts > +++ b/arch/arm64/boot/dts/arm/juno-r1.dts > @@ -85,7 +85,7 @@ > }; > = > A57_0: cpu@0 { > - compatible =3D "arm,cortex-a57","arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x0 0x0>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -102,7 +102,7 @@ > }; > = > A57_1: cpu@1 { > - compatible =3D "arm,cortex-a57","arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x0 0x1>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -119,7 +119,7 @@ > }; > = > A53_0: cpu@100 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x100>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -136,7 +136,7 @@ > }; > = > A53_1: cpu@101 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x101>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -153,7 +153,7 @@ > }; > = > A53_2: cpu@102 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x102>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -170,7 +170,7 @@ > }; > = > A53_3: cpu@103 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x103>; > device_type =3D "cpu"; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/ar= m/juno-r2.dts > index ab77adb4f3c2..4e693bd957b2 100644 > --- a/arch/arm64/boot/dts/arm/juno-r2.dts > +++ b/arch/arm64/boot/dts/arm/juno-r2.dts > @@ -85,7 +85,7 @@ > }; > = > A72_0: cpu@0 { > - compatible =3D "arm,cortex-a72","arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x0>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -102,7 +102,7 @@ > }; > = > A72_1: cpu@1 { > - compatible =3D "arm,cortex-a72","arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x1>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -119,7 +119,7 @@ > }; > = > A53_0: cpu@100 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x100>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -136,7 +136,7 @@ > }; > = > A53_1: cpu@101 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x101>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -153,7 +153,7 @@ > }; > = > A53_2: cpu@102 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x102>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -170,7 +170,7 @@ > }; > = > A53_3: cpu@103 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x103>; > device_type =3D "cpu"; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/j= uno.dts > index 08d4ba1716c3..148eb533f7a0 100644 > --- a/arch/arm64/boot/dts/arm/juno.dts > +++ b/arch/arm64/boot/dts/arm/juno.dts > @@ -84,7 +84,7 @@ > }; > = > A57_0: cpu@0 { > - compatible =3D "arm,cortex-a57","arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x0 0x0>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -101,7 +101,7 @@ > }; > = > A57_1: cpu@1 { > - compatible =3D "arm,cortex-a57","arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x0 0x1>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -118,7 +118,7 @@ > }; > = > A53_0: cpu@100 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x100>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -135,7 +135,7 @@ > }; > = > A53_1: cpu@101 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x101>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -152,7 +152,7 @@ > }; > = > A53_2: cpu@102 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x102>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -169,7 +169,7 @@ > }; > = > A53_3: cpu@103 { > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x103>; > device_type =3D "cpu"; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts b/arch/= arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts > index 8981c3d2ff18..22383c26bb03 100644 > --- a/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts > +++ b/arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts > @@ -43,14 +43,14 @@ > = > cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0 0>; > next-level-cache =3D <&L2_0>; > }; > = > cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0 1>; > next-level-cache =3D <&L2_0>; > }; > diff --git a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi b/arch/arm6= 4/boot/dts/broadcom/northstar2/ns2.dtsi > index ea854f689fda..15f7b0ed3836 100644 > --- a/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi > +++ b/arch/arm64/boot/dts/broadcom/northstar2/ns2.dtsi > @@ -47,7 +47,7 @@ > = > A57_0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0 0>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER0_L2>; > @@ -55,7 +55,7 @@ > = > A57_1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0 1>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER0_L2>; > @@ -63,7 +63,7 @@ > = > A57_2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0 2>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER0_L2>; > @@ -71,7 +71,7 @@ > = > A57_3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0 3>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER0_L2>; > diff --git a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi b/arch/a= rm64/boot/dts/broadcom/stingray/stingray.dtsi > index cfeaa855bd05..35c4670c00d1 100644 > --- a/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi > +++ b/arch/arm64/boot/dts/broadcom/stingray/stingray.dtsi > @@ -44,7 +44,7 @@ > = > cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER0_L2>; > @@ -52,7 +52,7 @@ > = > cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER0_L2>; > @@ -60,7 +60,7 @@ > = > cpu@100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x100>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER1_L2>; > @@ -68,7 +68,7 @@ > = > cpu@101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x101>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER1_L2>; > @@ -76,7 +76,7 @@ > = > cpu@200 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x200>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER2_L2>; > @@ -84,7 +84,7 @@ > = > cpu@201 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x201>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER2_L2>; > @@ -92,7 +92,7 @@ > = > cpu@300 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x300>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER3_L2>; > @@ -100,7 +100,7 @@ > = > cpu@301 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x301>; > enable-method =3D "psci"; > next-level-cache =3D <&CLUSTER3_L2>; > diff --git a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi b/arch/arm64/bo= ot/dts/cavium/thunder-88xx.dtsi > index 1a9103b269cb..e0a71795261b 100644 > --- a/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi > +++ b/arch/arm64/boot/dts/cavium/thunder-88xx.dtsi > @@ -64,289 +64,289 @@ > = > cpu@0 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x000>; > enable-method =3D "psci"; > }; > cpu@1 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x001>; > enable-method =3D "psci"; > }; > cpu@2 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x002>; > enable-method =3D "psci"; > }; > cpu@3 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x003>; > enable-method =3D "psci"; > }; > cpu@4 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x004>; > enable-method =3D "psci"; > }; > cpu@5 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x005>; > enable-method =3D "psci"; > }; > cpu@6 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x006>; > enable-method =3D "psci"; > }; > cpu@7 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x007>; > enable-method =3D "psci"; > }; > cpu@8 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x008>; > enable-method =3D "psci"; > }; > cpu@9 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x009>; > enable-method =3D "psci"; > }; > cpu@a { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x00a>; > enable-method =3D "psci"; > }; > cpu@b { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x00b>; > enable-method =3D "psci"; > }; > cpu@c { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x00c>; > enable-method =3D "psci"; > }; > cpu@d { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x00d>; > enable-method =3D "psci"; > }; > cpu@e { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x00e>; > enable-method =3D "psci"; > }; > cpu@f { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x00f>; > enable-method =3D "psci"; > }; > cpu@100 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x100>; > enable-method =3D "psci"; > }; > cpu@101 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x101>; > enable-method =3D "psci"; > }; > cpu@102 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x102>; > enable-method =3D "psci"; > }; > cpu@103 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x103>; > enable-method =3D "psci"; > }; > cpu@104 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x104>; > enable-method =3D "psci"; > }; > cpu@105 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x105>; > enable-method =3D "psci"; > }; > cpu@106 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x106>; > enable-method =3D "psci"; > }; > cpu@107 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x107>; > enable-method =3D "psci"; > }; > cpu@108 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x108>; > enable-method =3D "psci"; > }; > cpu@109 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x109>; > enable-method =3D "psci"; > }; > cpu@10a { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x10a>; > enable-method =3D "psci"; > }; > cpu@10b { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x10b>; > enable-method =3D "psci"; > }; > cpu@10c { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x10c>; > enable-method =3D "psci"; > }; > cpu@10d { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x10d>; > enable-method =3D "psci"; > }; > cpu@10e { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x10e>; > enable-method =3D "psci"; > }; > cpu@10f { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x10f>; > enable-method =3D "psci"; > }; > cpu@200 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x200>; > enable-method =3D "psci"; > }; > cpu@201 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x201>; > enable-method =3D "psci"; > }; > cpu@202 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x202>; > enable-method =3D "psci"; > }; > cpu@203 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x203>; > enable-method =3D "psci"; > }; > cpu@204 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x204>; > enable-method =3D "psci"; > }; > cpu@205 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x205>; > enable-method =3D "psci"; > }; > cpu@206 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x206>; > enable-method =3D "psci"; > }; > cpu@207 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x207>; > enable-method =3D "psci"; > }; > cpu@208 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x208>; > enable-method =3D "psci"; > }; > cpu@209 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x209>; > enable-method =3D "psci"; > }; > cpu@20a { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x20a>; > enable-method =3D "psci"; > }; > cpu@20b { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x20b>; > enable-method =3D "psci"; > }; > cpu@20c { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x20c>; > enable-method =3D "psci"; > }; > cpu@20d { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x20d>; > enable-method =3D "psci"; > }; > cpu@20e { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x20e>; > enable-method =3D "psci"; > }; > cpu@20f { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder", "arm,armv8"; > + compatible =3D "cavium,thunder"; > reg =3D <0x0 0x20f>; > enable-method =3D "psci"; > }; > diff --git a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi b/arch/arm64/b= oot/dts/cavium/thunder2-99xx.dtsi > index ff5c4c47b22b..c616132f7d6d 100644 > --- a/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi > +++ b/arch/arm64/boot/dts/cavium/thunder2-99xx.dtsi > @@ -27,28 +27,28 @@ > = > cpu@0 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder2", "brcm,vulcan", "arm,armv8"; > + compatible =3D "cavium,thunder2"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > }; > = > cpu@1 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder2", "brcm,vulcan", "arm,armv8"; > + compatible =3D "cavium,thunder2"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > }; > = > cpu@2 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder2", "brcm,vulcan", "arm,armv8"; > + compatible =3D "cavium,thunder2"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > }; > = > cpu@3 { > device_type =3D "cpu"; > - compatible =3D "cavium,thunder2", "brcm,vulcan", "arm,armv8"; > + compatible =3D "cavium,thunder2"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > }; > diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot= /dts/exynos/exynos5433.dtsi > index e7cd3b67d818..a04e80327b6e 100644 > --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi > @@ -29,7 +29,7 @@ > = > cpu0: cpu@100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > enable-method =3D "psci"; > reg =3D <0x100>; > clock-frequency =3D <1300000000>; > @@ -41,7 +41,7 @@ > = > cpu1: cpu@101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > enable-method =3D "psci"; > reg =3D <0x101>; > clock-frequency =3D <1300000000>; > @@ -51,7 +51,7 @@ > = > cpu2: cpu@102 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > enable-method =3D "psci"; > reg =3D <0x102>; > clock-frequency =3D <1300000000>; > @@ -61,7 +61,7 @@ > = > cpu3: cpu@103 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > enable-method =3D "psci"; > reg =3D <0x103>; > clock-frequency =3D <1300000000>; > @@ -71,7 +71,7 @@ > = > cpu4: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > enable-method =3D "psci"; > reg =3D <0x0>; > clock-frequency =3D <1900000000>; > @@ -83,7 +83,7 @@ > = > cpu5: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > enable-method =3D "psci"; > reg =3D <0x1>; > clock-frequency =3D <1900000000>; > @@ -93,7 +93,7 @@ > = > cpu6: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > enable-method =3D "psci"; > reg =3D <0x2>; > clock-frequency =3D <1900000000>; > @@ -103,7 +103,7 @@ > = > cpu7: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > enable-method =3D "psci"; > reg =3D <0x3>; > clock-frequency =3D <1900000000>; > diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dt= s/exynos/exynos7.dtsi > index 75ad724c487e..967558a93d82 100644 > --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi > @@ -34,28 +34,28 @@ > = > cpu_atlas0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x0>; > enable-method =3D "psci"; > }; > = > cpu_atlas1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x1>; > enable-method =3D "psci"; > }; > = > cpu_atlas2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x2>; > enable-method =3D "psci"; > }; > = > cpu_atlas3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x3>; > enable-method =3D "psci"; > }; > diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/= dts/hisilicon/hi3660.dtsi > index 20ae40df61d5..2f19e0e5b7cf 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi > @@ -56,7 +56,7 @@ > }; > = > cpu0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > @@ -70,7 +70,7 @@ > }; > = > cpu1: cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > @@ -83,7 +83,7 @@ > }; > = > cpu2: cpu@2 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > @@ -96,7 +96,7 @@ > }; > = > cpu3: cpu@3 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > @@ -109,7 +109,7 @@ > }; > = > cpu4: cpu@100 { > - compatible =3D "arm,cortex-a73", "arm,armv8"; > + compatible =3D "arm,cortex-a73"; > device_type =3D "cpu"; > reg =3D <0x0 0x100>; > enable-method =3D "psci"; > @@ -123,7 +123,7 @@ > }; > = > cpu5: cpu@101 { > - compatible =3D "arm,cortex-a73", "arm,armv8"; > + compatible =3D "arm,cortex-a73"; > device_type =3D "cpu"; > reg =3D <0x0 0x101>; > enable-method =3D "psci"; > @@ -136,7 +136,7 @@ > }; > = > cpu6: cpu@102 { > - compatible =3D "arm,cortex-a73", "arm,armv8"; > + compatible =3D "arm,cortex-a73"; > device_type =3D "cpu"; > reg =3D <0x0 0x102>; > enable-method =3D "psci"; > @@ -149,7 +149,7 @@ > }; > = > cpu7: cpu@103 { > - compatible =3D "arm,cortex-a73", "arm,armv8"; > + compatible =3D "arm,cortex-a73"; > device_type =3D "cpu"; > reg =3D <0x0 0x103>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/= dts/hisilicon/hi3670.dtsi > index a5bd6d80b226..2ed06e4588b8 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi > @@ -56,56 +56,56 @@ > }; > = > cpu0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > }; > = > cpu1: cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > }; > = > cpu2: cpu@2 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > }; > = > cpu3: cpu@3 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > }; > = > cpu4: cpu@100 { > - compatible =3D "arm,cortex-a73", "arm,armv8"; > + compatible =3D "arm,cortex-a73"; > device_type =3D "cpu"; > reg =3D <0x0 0x100>; > enable-method =3D "psci"; > }; > = > cpu5: cpu@101 { > - compatible =3D "arm,cortex-a73", "arm,armv8"; > + compatible =3D "arm,cortex-a73"; > device_type =3D "cpu"; > reg =3D <0x0 0x101>; > enable-method =3D "psci"; > }; > = > cpu6: cpu@102 { > - compatible =3D "arm,cortex-a73", "arm,armv8"; > + compatible =3D "arm,cortex-a73"; > device_type =3D "cpu"; > reg =3D <0x0 0x102>; > enable-method =3D "psci"; > }; > = > cpu7: cpu@103 { > - compatible =3D "arm,cortex-a73", "arm,armv8"; > + compatible =3D "arm,cortex-a73"; > device_type =3D "cpu"; > reg =3D <0x0 0x103>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/= dts/hisilicon/hi6220.dtsi > index aec9e371c2a7..732a9db45b23 100644 > --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi > @@ -81,7 +81,7 @@ > }; > = > cpu0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > @@ -94,7 +94,7 @@ > }; > = > cpu1: cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > @@ -107,7 +107,7 @@ > }; > = > cpu2: cpu@2 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > @@ -120,7 +120,7 @@ > }; > = > cpu3: cpu@3 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > @@ -133,7 +133,7 @@ > }; > = > cpu4: cpu@100 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x100>; > enable-method =3D "psci"; > @@ -146,7 +146,7 @@ > }; > = > cpu5: cpu@101 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x101>; > enable-method =3D "psci"; > @@ -159,7 +159,7 @@ > }; > = > cpu6: cpu@102 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x102>; > enable-method =3D "psci"; > @@ -172,7 +172,7 @@ > }; > = > cpu7: cpu@103 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0 0x103>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/d= ts/hisilicon/hip05.dtsi > index 4b472a302cd8..d321edc09c3f 100644 > --- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi > @@ -87,7 +87,7 @@ > = > cpu0: cpu@20000 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20000>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -95,7 +95,7 @@ > = > cpu1: cpu@20001 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20001>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -103,7 +103,7 @@ > = > cpu2: cpu@20002 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20002>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -111,7 +111,7 @@ > = > cpu3: cpu@20003 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20003>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -119,7 +119,7 @@ > = > cpu4: cpu@20100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20100>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -127,7 +127,7 @@ > = > cpu5: cpu@20101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20101>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -135,7 +135,7 @@ > = > cpu6: cpu@20102 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20102>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -143,7 +143,7 @@ > = > cpu7: cpu@20103 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20103>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -151,7 +151,7 @@ > = > cpu8: cpu@20200 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20200>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -159,7 +159,7 @@ > = > cpu9: cpu@20201 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20201>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -167,7 +167,7 @@ > = > cpu10: cpu@20202 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20202>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -175,7 +175,7 @@ > = > cpu11: cpu@20203 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20203>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -183,7 +183,7 @@ > = > cpu12: cpu@20300 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20300>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > @@ -191,7 +191,7 @@ > = > cpu13: cpu@20301 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20301>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > @@ -199,7 +199,7 @@ > = > cpu14: cpu@20302 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20302>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > @@ -207,7 +207,7 @@ > = > cpu15: cpu@20303 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x20303>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > diff --git a/arch/arm64/boot/dts/hisilicon/hip06.dtsi b/arch/arm64/boot/d= ts/hisilicon/hip06.dtsi > index d78a6a755d03..56625587b6de 100644 > --- a/arch/arm64/boot/dts/hisilicon/hip06.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hip06.dtsi > @@ -87,7 +87,7 @@ > = > cpu0: cpu@10000 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10000>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -95,7 +95,7 @@ > = > cpu1: cpu@10001 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10001>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -103,7 +103,7 @@ > = > cpu2: cpu@10002 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10002>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -111,7 +111,7 @@ > = > cpu3: cpu@10003 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10003>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -119,7 +119,7 @@ > = > cpu4: cpu@10100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10100>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -127,7 +127,7 @@ > = > cpu5: cpu@10101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10101>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -135,7 +135,7 @@ > = > cpu6: cpu@10102 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10102>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -143,7 +143,7 @@ > = > cpu7: cpu@10103 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10103>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -151,7 +151,7 @@ > = > cpu8: cpu@10200 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10200>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -159,7 +159,7 @@ > = > cpu9: cpu@10201 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10201>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -167,7 +167,7 @@ > = > cpu10: cpu@10202 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10202>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -175,7 +175,7 @@ > = > cpu11: cpu@10203 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10203>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -183,7 +183,7 @@ > = > cpu12: cpu@10300 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10300>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > @@ -191,7 +191,7 @@ > = > cpu13: cpu@10301 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10301>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > @@ -199,7 +199,7 @@ > = > cpu14: cpu@10302 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10302>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > @@ -207,7 +207,7 @@ > = > cpu15: cpu@10303 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x10303>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > diff --git a/arch/arm64/boot/dts/hisilicon/hip07.dtsi b/arch/arm64/boot/d= ts/hisilicon/hip07.dtsi > index c33adefc3061..28bd4389441f 100644 > --- a/arch/arm64/boot/dts/hisilicon/hip07.dtsi > +++ b/arch/arm64/boot/dts/hisilicon/hip07.dtsi > @@ -270,7 +270,7 @@ > = > cpu0: cpu@10000 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10000>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -279,7 +279,7 @@ > = > cpu1: cpu@10001 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10001>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -288,7 +288,7 @@ > = > cpu2: cpu@10002 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10002>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -297,7 +297,7 @@ > = > cpu3: cpu@10003 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10003>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster0_l2>; > @@ -306,7 +306,7 @@ > = > cpu4: cpu@10100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10100>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -315,7 +315,7 @@ > = > cpu5: cpu@10101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10101>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -324,7 +324,7 @@ > = > cpu6: cpu@10102 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10102>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -333,7 +333,7 @@ > = > cpu7: cpu@10103 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10103>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster1_l2>; > @@ -342,7 +342,7 @@ > = > cpu8: cpu@10200 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10200>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -351,7 +351,7 @@ > = > cpu9: cpu@10201 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10201>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -360,7 +360,7 @@ > = > cpu10: cpu@10202 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10202>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -369,7 +369,7 @@ > = > cpu11: cpu@10203 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10203>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster2_l2>; > @@ -378,7 +378,7 @@ > = > cpu12: cpu@10300 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10300>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > @@ -387,7 +387,7 @@ > = > cpu13: cpu@10301 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10301>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > @@ -396,7 +396,7 @@ > = > cpu14: cpu@10302 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10302>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > @@ -405,7 +405,7 @@ > = > cpu15: cpu@10303 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x10303>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster3_l2>; > @@ -414,7 +414,7 @@ > = > cpu16: cpu@30000 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30000>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster4_l2>; > @@ -423,7 +423,7 @@ > = > cpu17: cpu@30001 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30001>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster4_l2>; > @@ -432,7 +432,7 @@ > = > cpu18: cpu@30002 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30002>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster4_l2>; > @@ -441,7 +441,7 @@ > = > cpu19: cpu@30003 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30003>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster4_l2>; > @@ -450,7 +450,7 @@ > = > cpu20: cpu@30100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30100>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster5_l2>; > @@ -459,7 +459,7 @@ > = > cpu21: cpu@30101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30101>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster5_l2>; > @@ -468,7 +468,7 @@ > = > cpu22: cpu@30102 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30102>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster5_l2>; > @@ -477,7 +477,7 @@ > = > cpu23: cpu@30103 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30103>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster5_l2>; > @@ -486,7 +486,7 @@ > = > cpu24: cpu@30200 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30200>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster6_l2>; > @@ -495,7 +495,7 @@ > = > cpu25: cpu@30201 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30201>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster6_l2>; > @@ -504,7 +504,7 @@ > = > cpu26: cpu@30202 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30202>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster6_l2>; > @@ -513,7 +513,7 @@ > = > cpu27: cpu@30203 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30203>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster6_l2>; > @@ -522,7 +522,7 @@ > = > cpu28: cpu@30300 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30300>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster7_l2>; > @@ -531,7 +531,7 @@ > = > cpu29: cpu@30301 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30301>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster7_l2>; > @@ -540,7 +540,7 @@ > = > cpu30: cpu@30302 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30302>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster7_l2>; > @@ -549,7 +549,7 @@ > = > cpu31: cpu@30303 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x30303>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster7_l2>; > @@ -558,7 +558,7 @@ > = > cpu32: cpu@50000 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50000>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster8_l2>; > @@ -567,7 +567,7 @@ > = > cpu33: cpu@50001 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50001>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster8_l2>; > @@ -576,7 +576,7 @@ > = > cpu34: cpu@50002 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50002>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster8_l2>; > @@ -585,7 +585,7 @@ > = > cpu35: cpu@50003 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50003>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster8_l2>; > @@ -594,7 +594,7 @@ > = > cpu36: cpu@50100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50100>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster9_l2>; > @@ -603,7 +603,7 @@ > = > cpu37: cpu@50101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50101>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster9_l2>; > @@ -612,7 +612,7 @@ > = > cpu38: cpu@50102 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50102>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster9_l2>; > @@ -621,7 +621,7 @@ > = > cpu39: cpu@50103 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50103>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster9_l2>; > @@ -630,7 +630,7 @@ > = > cpu40: cpu@50200 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50200>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster10_l2>; > @@ -639,7 +639,7 @@ > = > cpu41: cpu@50201 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50201>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster10_l2>; > @@ -648,7 +648,7 @@ > = > cpu42: cpu@50202 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50202>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster10_l2>; > @@ -657,7 +657,7 @@ > = > cpu43: cpu@50203 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50203>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster10_l2>; > @@ -666,7 +666,7 @@ > = > cpu44: cpu@50300 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50300>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster11_l2>; > @@ -675,7 +675,7 @@ > = > cpu45: cpu@50301 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50301>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster11_l2>; > @@ -684,7 +684,7 @@ > = > cpu46: cpu@50302 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50302>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster11_l2>; > @@ -693,7 +693,7 @@ > = > cpu47: cpu@50303 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x50303>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster11_l2>; > @@ -702,7 +702,7 @@ > = > cpu48: cpu@70000 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70000>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster12_l2>; > @@ -711,7 +711,7 @@ > = > cpu49: cpu@70001 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70001>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster12_l2>; > @@ -720,7 +720,7 @@ > = > cpu50: cpu@70002 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70002>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster12_l2>; > @@ -729,7 +729,7 @@ > = > cpu51: cpu@70003 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70003>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster12_l2>; > @@ -738,7 +738,7 @@ > = > cpu52: cpu@70100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70100>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster13_l2>; > @@ -747,7 +747,7 @@ > = > cpu53: cpu@70101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70101>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster13_l2>; > @@ -756,7 +756,7 @@ > = > cpu54: cpu@70102 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70102>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster13_l2>; > @@ -765,7 +765,7 @@ > = > cpu55: cpu@70103 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70103>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster13_l2>; > @@ -774,7 +774,7 @@ > = > cpu56: cpu@70200 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70200>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster14_l2>; > @@ -783,7 +783,7 @@ > = > cpu57: cpu@70201 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70201>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster14_l2>; > @@ -792,7 +792,7 @@ > = > cpu58: cpu@70202 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70202>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster14_l2>; > @@ -801,7 +801,7 @@ > = > cpu59: cpu@70203 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70203>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster14_l2>; > @@ -810,7 +810,7 @@ > = > cpu60: cpu@70300 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70300>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster15_l2>; > @@ -819,7 +819,7 @@ > = > cpu61: cpu@70301 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70301>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster15_l2>; > @@ -828,7 +828,7 @@ > = > cpu62: cpu@70302 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70302>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster15_l2>; > @@ -837,7 +837,7 @@ > = > cpu63: cpu@70303 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x70303>; > enable-method =3D "psci"; > next-level-cache =3D <&cluster15_l2>; > diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/= lg1312.dtsi > index 4bde7b6f2b11..c8dc9c20fba3 100644 > --- a/arch/arm64/boot/dts/lg/lg1312.dtsi > +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi > @@ -21,27 +21,27 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > next-level-cache =3D <&L2_0>; > }; > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > next-level-cache =3D <&L2_0>; > }; > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > next-level-cache =3D <&L2_0>; > }; > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > next-level-cache =3D <&L2_0>; > diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/= lg1313.dtsi > index 16ced1ff1ad3..82c6645b58b7 100644 > --- a/arch/arm64/boot/dts/lg/lg1313.dtsi > +++ b/arch/arm64/boot/dts/lg/lg1313.dtsi > @@ -21,27 +21,27 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > next-level-cache =3D <&L2_0>; > }; > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > next-level-cache =3D <&L2_0>; > }; > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > next-level-cache =3D <&L2_0>; > }; > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > next-level-cache =3D <&L2_0>; > diff --git a/arch/arm64/boot/dts/marvell/armada-372x.dtsi b/arch/arm64/bo= ot/dts/marvell/armada-372x.dtsi > index 6800945a88ad..5ce55bdbb995 100644 > --- a/arch/arm64/boot/dts/marvell/armada-372x.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-372x.dtsi > @@ -18,7 +18,7 @@ > cpus { > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x1>; > clocks =3D <&nb_periph_clk 16>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/bo= ot/dts/marvell/armada-37xx.dtsi > index e05594ea15fb..3087da80c72b 100644 > --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi > @@ -42,7 +42,7 @@ > #size-cells =3D <0>; > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0>; > clocks =3D <&nb_periph_clk 16>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi b/arch/ar= m64/boot/dts/marvell/armada-ap806-dual.dtsi > index d3c0636558ff..861fd21922c4 100644 > --- a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi > @@ -17,13 +17,13 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x000>; > enable-method =3D "psci"; > }; > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x001>; > enable-method =3D "psci"; > }; > diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi b/arch/ar= m64/boot/dts/marvell/armada-ap806-quad.dtsi > index 01ea662afba8..2baafe12ebd4 100644 > --- a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi > @@ -17,25 +17,25 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x000>; > enable-method =3D "psci"; > }; > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x001>; > enable-method =3D "psci"; > }; > cpu2: cpu@100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x100>; > enable-method =3D "psci"; > }; > cpu3: cpu@101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x101>; > enable-method =3D "psci"; > }; > diff --git a/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi = b/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi > index b788cb63caf2..d1a7143ef3d4 100644 > --- a/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi > +++ b/arch/arm64/boot/dts/marvell/armada-ap810-ap0-octa-core.dtsi > @@ -15,49 +15,49 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x000>; > enable-method =3D "psci"; > }; > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x001>; > enable-method =3D "psci"; > }; > cpu2: cpu@100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x100>; > enable-method =3D "psci"; > }; > cpu3: cpu@101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x101>; > enable-method =3D "psci"; > }; > cpu4: cpu@200 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x200>; > enable-method =3D "psci"; > }; > cpu5: cpu@201 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x201>; > enable-method =3D "psci"; > }; > cpu6: cpu@300 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x300>; > enable-method =3D "psci"; > }; > cpu7: cpu@301 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x301>; > enable-method =3D "psci"; > }; > diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/d= ts/mediatek/mt7622.dtsi > index 8fc4aa77f012..0806daa12541 100644 > --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi > @@ -70,7 +70,7 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > clocks =3D <&infracfg CLK_INFRA_MUX1_SEL>, > <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>; > @@ -84,7 +84,7 @@ > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > clocks =3D <&infracfg CLK_INFRA_MUX1_SEL>, > <&apmixedsys CLK_APMIXED_MAIN_CORE_EN>; > diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/d= ts/nvidia/tegra132.dtsi > index fa5a7c4bc807..631a7f77c386 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi > @@ -1082,13 +1082,13 @@ > = > cpu@0 { > device_type =3D "cpu"; > - compatible =3D "nvidia,denver", "arm,armv8"; > + compatible =3D "nvidia,denver"; > reg =3D <0>; > }; > = > cpu@1 { > device_type =3D "cpu"; > - compatible =3D "nvidia,denver", "arm,armv8"; > + compatible =3D "nvidia,denver"; > reg =3D <1>; > }; > }; > diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/d= ts/nvidia/tegra186.dtsi > index 22815db4a3ed..66ea7e7c79f5 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi > @@ -982,37 +982,37 @@ > #size-cells =3D <0>; > = > cpu@0 { > - compatible =3D "nvidia,tegra186-denver", "arm,armv8"; > + compatible =3D "nvidia,tegra186-denver"; > device_type =3D "cpu"; > reg =3D <0x000>; > }; > = > cpu@1 { > - compatible =3D "nvidia,tegra186-denver", "arm,armv8"; > + compatible =3D "nvidia,tegra186-denver"; > device_type =3D "cpu"; > reg =3D <0x001>; > }; > = > cpu@2 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > device_type =3D "cpu"; > reg =3D <0x100>; > }; > = > cpu@3 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > device_type =3D "cpu"; > reg =3D <0x101>; > }; > = > cpu@4 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > device_type =3D "cpu"; > reg =3D <0x102>; > }; > = > cpu@5 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > device_type =3D "cpu"; > reg =3D <0x103>; > }; > diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/d= ts/nvidia/tegra194.dtsi > index 6dfa1ca0b851..35e290c35550 100644 > --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi > +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi > @@ -871,56 +871,56 @@ > #size-cells =3D <0>; > = > cpu@0 { > - compatible =3D "nvidia,tegra194-carmel", "arm,armv8"; > + compatible =3D "nvidia,tegra194-carmel"; > device_type =3D "cpu"; > reg =3D <0x10000>; > enable-method =3D "psci"; > }; > = > cpu@1 { > - compatible =3D "nvidia,tegra194-carmel", "arm,armv8"; > + compatible =3D "nvidia,tegra194-carmel"; > device_type =3D "cpu"; > reg =3D <0x10001>; > enable-method =3D "psci"; > }; > = > cpu@2 { > - compatible =3D "nvidia,tegra194-carmel", "arm,armv8"; > + compatible =3D "nvidia,tegra194-carmel"; > device_type =3D "cpu"; > reg =3D <0x100>; > enable-method =3D "psci"; > }; > = > cpu@3 { > - compatible =3D "nvidia,tegra194-carmel", "arm,armv8"; > + compatible =3D "nvidia,tegra194-carmel"; > device_type =3D "cpu"; > reg =3D <0x101>; > enable-method =3D "psci"; > }; > = > cpu@4 { > - compatible =3D "nvidia,tegra194-carmel", "arm,armv8"; > + compatible =3D "nvidia,tegra194-carmel"; > device_type =3D "cpu"; > reg =3D <0x200>; > enable-method =3D "psci"; > }; > = > cpu@5 { > - compatible =3D "nvidia,tegra194-carmel", "arm,armv8"; > + compatible =3D "nvidia,tegra194-carmel"; > device_type =3D "cpu"; > reg =3D <0x201>; > enable-method =3D "psci"; > }; > = > cpu@6 { > - compatible =3D "nvidia,tegra194-carmel", "arm,armv8"; > + compatible =3D "nvidia,tegra194-carmel"; > device_type =3D "cpu"; > reg =3D <0x10300>; > enable-method =3D "psci"; > }; > = > cpu@7 { > - compatible =3D "nvidia,tegra194-carmel", "arm,armv8"; > + compatible =3D "nvidia,tegra194-carmel"; > device_type =3D "cpu"; > reg =3D <0x10301>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/= qcom/ipq8074.dtsi > index 18226980f7c3..aea1dbc3f53e 100644 > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > @@ -441,7 +441,7 @@ > = > CPU0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0>; > next-level-cache =3D <&L2_0>; > enable-method =3D "psci"; > @@ -449,7 +449,7 @@ > = > CPU1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > enable-method =3D "psci"; > reg =3D <0x1>; > next-level-cache =3D <&L2_0>; > @@ -457,7 +457,7 @@ > = > CPU2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > enable-method =3D "psci"; > reg =3D <0x2>; > next-level-cache =3D <&L2_0>; > @@ -465,7 +465,7 @@ > = > CPU3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > enable-method =3D "psci"; > reg =3D <0x3>; > next-level-cache =3D <&L2_0>; > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/= qcom/msm8916.dtsi > index c5348c3da5a2..bfa61ca1b1c5 100644 > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > @@ -106,7 +106,7 @@ > = > CPU0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0>; > next-level-cache =3D <&L2_0>; > enable-method =3D "psci"; > @@ -118,7 +118,7 @@ > = > CPU1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x1>; > next-level-cache =3D <&L2_0>; > enable-method =3D "psci"; > @@ -130,7 +130,7 @@ > = > CPU2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x2>; > next-level-cache =3D <&L2_0>; > enable-method =3D "psci"; > @@ -142,7 +142,7 @@ > = > CPU3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x3>; > next-level-cache =3D <&L2_0>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/= qcom/msm8992.dtsi > index cf5cacdd624d..50cefb822d6d 100644 > --- a/arch/arm64/boot/dts/qcom/msm8992.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi > @@ -38,7 +38,7 @@ > = > CPU0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > next-level-cache =3D <&L2_0>; > L2_0: l2-cache { > diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/= qcom/msm8994.dtsi > index f33c41d01c86..6a4049aae0c3 100644 > --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi > @@ -40,7 +40,7 @@ > = > CPU0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0>; > next-level-cache =3D <&L2_0>; > L2_0: l2-cache { > diff --git a/arch/arm64/boot/dts/realtek/rtd1295.dtsi b/arch/arm64/boot/d= ts/realtek/rtd1295.dtsi > index 8d9ac05d17dc..41d7858da826 100644 > --- a/arch/arm64/boot/dts/realtek/rtd1295.dtsi > +++ b/arch/arm64/boot/dts/realtek/rtd1295.dtsi > @@ -17,28 +17,28 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > next-level-cache =3D <&l2>; > }; > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > next-level-cache =3D <&l2>; > }; > = > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > next-level-cache =3D <&l2>; > }; > = > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > next-level-cache =3D <&l2>; > }; > diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/= dts/renesas/r8a774a1.dtsi > index 20745a8528c5..2c11b18b7d78 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi > @@ -61,7 +61,7 @@ > #size-cells =3D <0>; > = > a57_0: cpu@0 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x0>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A774A1_PD_CA57_CPU0>; > @@ -71,7 +71,7 @@ > }; > = > a57_1: cpu@1 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x1>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A774A1_PD_CA57_CPU1>; > @@ -81,7 +81,7 @@ > }; > = > a53_0: cpu@100 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x100>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A774A1_PD_CA53_CPU0>; > @@ -91,7 +91,7 @@ > }; > = > a53_1: cpu@101 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x101>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A774A1_PD_CA53_CPU1>; > @@ -101,7 +101,7 @@ > }; > = > a53_2: cpu@102 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x102>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A774A1_PD_CA53_CPU2>; > @@ -111,7 +111,7 @@ > }; > = > a53_3: cpu@103 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x103>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A774A1_PD_CA53_CPU3>; > diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/d= ts/renesas/r8a7795.dtsi > index af9605d5db27..4bb8a877cdf8 100644 > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > @@ -149,7 +149,7 @@ > }; > = > a57_0: cpu@0 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x0>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7795_PD_CA57_CPU0>; > @@ -162,7 +162,7 @@ > }; > = > a57_1: cpu@1 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x1>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7795_PD_CA57_CPU1>; > @@ -175,7 +175,7 @@ > }; > = > a57_2: cpu@2 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x2>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7795_PD_CA57_CPU2>; > @@ -188,7 +188,7 @@ > }; > = > a57_3: cpu@3 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x3>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7795_PD_CA57_CPU3>; > @@ -201,7 +201,7 @@ > }; > = > a53_0: cpu@100 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x100>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7795_PD_CA53_CPU0>; > @@ -213,7 +213,7 @@ > }; > = > a53_1: cpu@101 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x101>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7795_PD_CA53_CPU1>; > @@ -225,7 +225,7 @@ > }; > = > a53_2: cpu@102 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x102>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7795_PD_CA53_CPU2>; > @@ -237,7 +237,7 @@ > }; > = > a53_3: cpu@103 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x103>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7795_PD_CA53_CPU3>; > diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/d= ts/renesas/r8a7796.dtsi > index afedbf5728ec..f613d3cefab2 100644 > --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi > @@ -154,7 +154,7 @@ > }; > = > a57_0: cpu@0 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x0>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7796_PD_CA57_CPU0>; > @@ -167,7 +167,7 @@ > }; > = > a57_1: cpu@1 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x1>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7796_PD_CA57_CPU1>; > @@ -180,7 +180,7 @@ > }; > = > a53_0: cpu@100 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x100>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7796_PD_CA53_CPU0>; > @@ -192,7 +192,7 @@ > }; > = > a53_1: cpu@101 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x101>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7796_PD_CA53_CPU1>; > @@ -204,7 +204,7 @@ > }; > = > a53_2: cpu@102 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x102>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7796_PD_CA53_CPU2>; > @@ -216,7 +216,7 @@ > }; > = > a53_3: cpu@103 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x103>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A7796_PD_CA53_CPU3>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/= dts/renesas/r8a77965.dtsi > index 6dc9b1fef830..979f14d1fcc4 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi > @@ -105,7 +105,7 @@ > #size-cells =3D <0>; > = > a57_0: cpu@0 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x0>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A77965_PD_CA57_CPU0>; > @@ -116,7 +116,7 @@ > }; > = > a57_1: cpu@1 { > - compatible =3D "arm,cortex-a57", "arm,armv8"; > + compatible =3D "arm,cortex-a57"; > reg =3D <0x1>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A77965_PD_CA57_CPU1>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/= dts/renesas/r8a77970.dtsi > index 563428d1cdc2..5b6164d4b8e3 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi > @@ -37,7 +37,7 @@ > = > a53_0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0>; > clocks =3D <&cpg CPG_CORE R8A77970_CLK_Z2>; > power-domains =3D <&sysc R8A77970_PD_CA53_CPU0>; > @@ -47,7 +47,7 @@ > = > a53_1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <1>; > clocks =3D <&cpg CPG_CORE R8A77970_CLK_Z2>; > power-domains =3D <&sysc R8A77970_PD_CA53_CPU1>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/= dts/renesas/r8a77980.dtsi > index 5bd9b2547c36..4081622d548a 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi > @@ -38,7 +38,7 @@ > = > a53_0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0>; > clocks =3D <&cpg CPG_CORE R8A77980_CLK_Z2>; > power-domains =3D <&sysc R8A77980_PD_CA53_CPU0>; > @@ -48,7 +48,7 @@ > = > a53_1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <1>; > clocks =3D <&cpg CPG_CORE R8A77980_CLK_Z2>; > power-domains =3D <&sysc R8A77980_PD_CA53_CPU1>; > @@ -58,7 +58,7 @@ > = > a53_2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <2>; > clocks =3D <&cpg CPG_CORE R8A77980_CLK_Z2>; > power-domains =3D <&sysc R8A77980_PD_CA53_CPU2>; > @@ -68,7 +68,7 @@ > = > a53_3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <3>; > clocks =3D <&cpg CPG_CORE R8A77980_CLK_Z2>; > power-domains =3D <&sysc R8A77980_PD_CA53_CPU3>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/= dts/renesas/r8a77990.dtsi > index b2f606e286ce..5ce2dcea5136 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi > @@ -60,7 +60,7 @@ > #size-cells =3D <0>; > = > a53_0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A77990_PD_CA53_CPU0>; > @@ -69,7 +69,7 @@ > }; > = > a53_1: cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <1>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A77990_PD_CA53_CPU1>; > diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/= dts/renesas/r8a77995.dtsi > index 8530d9fc1371..5bf3af246e14 100644 > --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi > @@ -27,7 +27,7 @@ > #size-cells =3D <0>; > = > a53_0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0>; > device_type =3D "cpu"; > power-domains =3D <&sysc R8A77995_PD_CA53_CPU0>; > diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts= /rockchip/px30.dtsi > index 9aa8d5ef9e45..eb992d60e6ba 100644 > --- a/arch/arm64/boot/dts/rockchip/px30.dtsi > +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi > @@ -40,7 +40,7 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a35", "arm,armv8"; > + compatible =3D "arm,cortex-a35"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > clocks =3D <&cru ARMCLK>; > @@ -52,7 +52,7 @@ > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a35", "arm,armv8"; > + compatible =3D "arm,cortex-a35"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > clocks =3D <&cru ARMCLK>; > @@ -64,7 +64,7 @@ > = > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a35", "arm,armv8"; > + compatible =3D "arm,cortex-a35"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > clocks =3D <&cru ARMCLK>; > @@ -76,7 +76,7 @@ > = > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a35", "arm,armv8"; > + compatible =3D "arm,cortex-a35"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > clocks =3D <&cru ARMCLK>; > diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/d= ts/rockchip/rk3328.dtsi > index ecd7f19c3542..0f72bb33ce86 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > @@ -37,7 +37,7 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > clocks =3D <&cru ARMCLK>; > #cooling-cells =3D <2>; > @@ -49,7 +49,7 @@ > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > clocks =3D <&cru ARMCLK>; > #cooling-cells =3D <2>; > @@ -61,7 +61,7 @@ > = > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > clocks =3D <&cru ARMCLK>; > #cooling-cells =3D <2>; > @@ -73,7 +73,7 @@ > = > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > clocks =3D <&cru ARMCLK>; > #cooling-cells =3D <2>; > diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/d= ts/rockchip/rk3368.dtsi > index 7014d10b954c..06e7c31d7d07 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi > @@ -73,7 +73,7 @@ > = > cpu_l0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > #cooling-cells =3D <2>; /* min followed by max */ > @@ -81,7 +81,7 @@ > = > cpu_l1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > #cooling-cells =3D <2>; /* min followed by max */ > @@ -89,7 +89,7 @@ > = > cpu_l2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > #cooling-cells =3D <2>; /* min followed by max */ > @@ -97,7 +97,7 @@ > = > cpu_l3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > #cooling-cells =3D <2>; /* min followed by max */ > @@ -105,7 +105,7 @@ > = > cpu_b0: cpu@100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x100>; > enable-method =3D "psci"; > #cooling-cells =3D <2>; /* min followed by max */ > @@ -113,7 +113,7 @@ > = > cpu_b1: cpu@101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x101>; > enable-method =3D "psci"; > #cooling-cells =3D <2>; /* min followed by max */ > @@ -121,7 +121,7 @@ > = > cpu_b2: cpu@102 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x102>; > enable-method =3D "psci"; > #cooling-cells =3D <2>; /* min followed by max */ > @@ -129,7 +129,7 @@ > = > cpu_b3: cpu@103 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x103>; > enable-method =3D "psci"; > #cooling-cells =3D <2>; /* min followed by max */ > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/d= ts/rockchip/rk3399.dtsi > index 6cc1c9fa4ea6..db9d948c0b03 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > @@ -68,7 +68,7 @@ > = > cpu_l0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > clocks =3D <&cru ARMCLKL>; > @@ -79,7 +79,7 @@ > = > cpu_l1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > clocks =3D <&cru ARMCLKL>; > @@ -90,7 +90,7 @@ > = > cpu_l2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > clocks =3D <&cru ARMCLKL>; > @@ -101,7 +101,7 @@ > = > cpu_l3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > clocks =3D <&cru ARMCLKL>; > @@ -112,7 +112,7 @@ > = > cpu_b0: cpu@100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x100>; > enable-method =3D "psci"; > clocks =3D <&cru ARMCLKB>; > @@ -123,7 +123,7 @@ > = > cpu_b1: cpu@101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0x0 0x101>; > enable-method =3D "psci"; > clocks =3D <&cru ARMCLKB>; > diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm6= 4/boot/dts/socionext/uniphier-ld11.dtsi > index 31ba52b14e99..a3cd475b48d2 100644 > --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi > +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi > @@ -33,7 +33,7 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0 0x000>; > clocks =3D <&sys_clk 33>; > enable-method =3D "psci"; > @@ -42,7 +42,7 @@ > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0 0x001>; > clocks =3D <&sys_clk 33>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm6= 4/boot/dts/socionext/uniphier-ld20.dtsi > index 4a0c46cb11cd..7a68ee1a35d5 100644 > --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi > +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi > @@ -43,7 +43,7 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0 0x000>; > clocks =3D <&sys_clk 32>; > enable-method =3D "psci"; > @@ -53,7 +53,7 @@ > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a72", "arm,armv8"; > + compatible =3D "arm,cortex-a72"; > reg =3D <0 0x001>; > clocks =3D <&sys_clk 32>; > enable-method =3D "psci"; > @@ -63,7 +63,7 @@ > = > cpu2: cpu@100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0 0x100>; > clocks =3D <&sys_clk 33>; > enable-method =3D "psci"; > @@ -73,7 +73,7 @@ > = > cpu3: cpu@101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0 0x101>; > clocks =3D <&sys_clk 33>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi b/arch/arm6= 4/boot/dts/socionext/uniphier-pxs3.dtsi > index 4f57c9e9d7a8..152c89a64da5 100644 > --- a/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi > +++ b/arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi > @@ -39,7 +39,7 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0 0x000>; > clocks =3D <&sys_clk 33>; > enable-method =3D "psci"; > @@ -48,7 +48,7 @@ > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0 0x001>; > clocks =3D <&sys_clk 33>; > enable-method =3D "psci"; > @@ -57,7 +57,7 @@ > = > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0 0x002>; > clocks =3D <&sys_clk 33>; > enable-method =3D "psci"; > @@ -66,7 +66,7 @@ > = > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0 0x003>; > clocks =3D <&sys_clk 33>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/sprd/sc9836.dtsi b/arch/arm64/boot/dts/s= prd/sc9836.dtsi > index 4bcdbb709c01..286d7173f94f 100644 > --- a/arch/arm64/boot/dts/sprd/sc9836.dtsi > +++ b/arch/arm64/boot/dts/sprd/sc9836.dtsi > @@ -18,28 +18,28 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > }; > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > }; > = > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > }; > = > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > }; > diff --git a/arch/arm64/boot/dts/sprd/sc9860.dtsi b/arch/arm64/boot/dts/s= prd/sc9860.dtsi > index 5f57bf055cde..b25d19977170 100644 > --- a/arch/arm64/boot/dts/sprd/sc9860.dtsi > +++ b/arch/arm64/boot/dts/sprd/sc9860.dtsi > @@ -50,7 +50,7 @@ > = > CPU0: cpu@530000 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x530000>; > enable-method =3D "psci"; > cpu-idle-states =3D <&CORE_PD &CLUSTER_PD>; > @@ -58,7 +58,7 @@ > = > CPU1: cpu@530001 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x530001>; > enable-method =3D "psci"; > cpu-idle-states =3D <&CORE_PD &CLUSTER_PD>; > @@ -66,7 +66,7 @@ > = > CPU2: cpu@530002 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x530002>; > enable-method =3D "psci"; > cpu-idle-states =3D <&CORE_PD &CLUSTER_PD>; > @@ -74,7 +74,7 @@ > = > CPU3: cpu@530003 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x530003>; > enable-method =3D "psci"; > cpu-idle-states =3D <&CORE_PD &CLUSTER_PD>; > @@ -82,7 +82,7 @@ > = > CPU4: cpu@530100 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x530100>; > enable-method =3D "psci"; > cpu-idle-states =3D <&CORE_PD &CLUSTER_PD>; > @@ -90,7 +90,7 @@ > = > CPU5: cpu@530101 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x530101>; > enable-method =3D "psci"; > cpu-idle-states =3D <&CORE_PD &CLUSTER_PD>; > @@ -98,7 +98,7 @@ > = > CPU6: cpu@530102 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x530102>; > enable-method =3D "psci"; > cpu-idle-states =3D <&CORE_PD &CLUSTER_PD>; > @@ -106,7 +106,7 @@ > = > CPU7: cpu@530103 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x530103>; > enable-method =3D "psci"; > cpu-idle-states =3D <&CORE_PD &CLUSTER_PD>; > diff --git a/arch/arm64/boot/dts/synaptics/as370.dtsi b/arch/arm64/boot/d= ts/synaptics/as370.dtsi > index 7331acf3874e..addeb0efc616 100644 > --- a/arch/arm64/boot/dts/synaptics/as370.dtsi > +++ b/arch/arm64/boot/dts/synaptics/as370.dtsi > @@ -23,7 +23,7 @@ > #size-cells =3D <0>; > = > cpu0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0>; > enable-method =3D "psci"; > @@ -32,7 +32,7 @@ > }; > = > cpu1: cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x1>; > enable-method =3D "psci"; > @@ -41,7 +41,7 @@ > }; > = > cpu2: cpu@2 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x2>; > enable-method =3D "psci"; > @@ -50,7 +50,7 @@ > }; > = > cpu3: cpu@3 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x3>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi b/arch/arm64/bo= ot/dts/synaptics/berlin4ct.dtsi > index 216767e2edf6..15625b99e336 100644 > --- a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi > +++ b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi > @@ -27,7 +27,7 @@ > #size-cells =3D <0>; > = > cpu0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x0>; > enable-method =3D "psci"; > @@ -36,7 +36,7 @@ > }; > = > cpu1: cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x1>; > enable-method =3D "psci"; > @@ -45,7 +45,7 @@ > }; > = > cpu2: cpu@2 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x2>; > enable-method =3D "psci"; > @@ -54,7 +54,7 @@ > }; > = > cpu3: cpu@3 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > reg =3D <0x3>; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/ti/k3-am654.dtsi b/arch/arm64/boot/dts/t= i/k3-am654.dtsi > index 2affa6f6617e..b221abf43ac2 100644 > --- a/arch/arm64/boot/dts/ti/k3-am654.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am654.dtsi > @@ -34,7 +34,7 @@ > }; > = > cpu0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x000>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -48,7 +48,7 @@ > }; > = > cpu1: cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x001>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -62,7 +62,7 @@ > }; > = > cpu2: cpu@100 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x100>; > device_type =3D "cpu"; > enable-method =3D "psci"; > @@ -76,7 +76,7 @@ > }; > = > cpu3: cpu@101 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x101>; > device_type =3D "cpu"; > enable-method =3D "psci"; > diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts= /xilinx/zynqmp.dtsi > index fa4fd777d90e..9aa67340a4d8 100644 > --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi > @@ -22,7 +22,7 @@ > #size-cells =3D <0>; > = > cpu0: cpu@0 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > enable-method =3D "psci"; > operating-points-v2 =3D <&cpu_opp_table>; > @@ -31,7 +31,7 @@ > }; > = > cpu1: cpu@1 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > enable-method =3D "psci"; > reg =3D <0x1>; > @@ -40,7 +40,7 @@ > }; > = > cpu2: cpu@2 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > enable-method =3D "psci"; > reg =3D <0x2>; > @@ -49,7 +49,7 @@ > }; > = > cpu3: cpu@3 { > - compatible =3D "arm,cortex-a53", "arm,armv8"; > + compatible =3D "arm,cortex-a53"; > device_type =3D "cpu"; > enable-method =3D "psci"; > reg =3D <0x3>; > diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi b/arch/arm64/boot/dts/= zte/zx296718.dtsi > index 6eef64761009..cc54837ff4ba 100644 > --- a/arch/arm64/boot/dts/zte/zx296718.dtsi > +++ b/arch/arm64/boot/dts/zte/zx296718.dtsi > @@ -86,7 +86,7 @@ > = > cpu0: cpu@0 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x0>; > enable-method =3D "psci"; > clocks =3D <&topcrm A53_GATE>; > @@ -95,7 +95,7 @@ > = > cpu1: cpu@1 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x1>; > enable-method =3D "psci"; > clocks =3D <&topcrm A53_GATE>; > @@ -104,7 +104,7 @@ > = > cpu2: cpu@2 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x2>; > enable-method =3D "psci"; > clocks =3D <&topcrm A53_GATE>; > @@ -113,7 +113,7 @@ > = > cpu3: cpu@3 { > device_type =3D "cpu"; > - compatible =3D "arm,cortex-a53","arm,armv8"; > + compatible =3D "arm,cortex-a53"; > reg =3D <0x0 0x3>; > enable-method =3D "psci"; > clocks =3D <&topcrm A53_GATE>; > -- = > 2.19.1 > = -- = Antoine T=E9nart, Bootlin Embedded Linux and Kernel engineering https://bootlin.com _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic