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[2003:f1:371c:b100:428d:5cff:feb9:9db8]) by smtp.googlemail.com with ESMTPSA id n65sm18004803wmf.28.2019.11.17.05.59.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 17 Nov 2019 05:59:54 -0800 (PST) From: Martin Blumenstingl To: narmstrong@baylibre.com, jbrunet@baylibre.com, linux-amlogic@lists.infradead.org Subject: [PATCH v3 0/5] provide the XTAL clock via OF on Meson8/8b/8m2 Date: Sun, 17 Nov 2019 14:59:22 +0100 Message-Id: <20191117135927.135428-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.24.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191117_055957_590339_F4AF80D1 X-CRM114-Status: GOOD ( 13.98 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org So far the HHI clock controller has been providing the XTAL clock on Amlogic Meson8/Meson8b/Meson8m2 SoCs. This is not correct because the XTAL is actually a crystal on the boards and the SoC has a dedicated input for it. This updates the dt-bindings of the HHI clock controller and defines a fixed-clock in meson.dtsi (along with switching everything over to use this clock). The clock driver needs three updates to use this: - patch #2 uses clk_hw_set_parent in the CPU clock notifier. This drops the explicit reference to CLKID_XTAL while at the same time making the code much easier (thanks to Neil for providing this new method as part of the G12A CPU clock bringup!) - patch #3 ensures that the clock driver doesn't rely on it's internal XTAL clock while not losing support for older .dtbs that don't have the XTAL clock input yet - with patch #4 the clock controller's own XTAL clock is not registered anymore when a clock input is provided via OF This series is a functional no-op. It's main goal is to better represent how the actual hardware looks like. Changes since v2 at [1]: - add .fw_name in addition to .name in patch #3 as suggested by Jerome - dropped the dts patch so this whole series targets clk-meson - moved patch #5 from another series to this one because once we drop .name = "xtal" the clocks need to be aware of the OF node Changes since v1 at [0]: - add Rob's Reviewed-by to the dt-bindings patch - check that "xtal" clock is actually passed via OF instead of checking that there's any parent at all (which in the worst case may not be the xtal clock) as suggested by Jerome [0] https://patchwork.kernel.org/cover/11155515/ [1] https://patchwork.kernel.org/cover/11214189/ Martin Blumenstingl (5): dt-bindings: clock: meson8b: add the clock inputs clk: meson: meson8b: use clk_hw_set_parent in the CPU clock notifier clk: meson: meson8b: change references to the XTAL clock to use [fw_]name clk: meson: meson8b: don't register the XTAL clock when provided via OF clk: meson: meson8b: use of_clk_hw_register to register the clocks .../bindings/clock/amlogic,meson8b-clkc.txt | 5 + drivers/clk/meson/meson8b.c | 113 ++++++++++-------- 2 files changed, 67 insertions(+), 51 deletions(-) -- 2.24.0 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic