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[2003:f1:3713:2e00:428d:5cff:feb9:9db8]) by smtp.googlemail.com with ESMTPSA id d9sm9154234wmd.10.2020.05.12.14.51.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2020 14:51:55 -0700 (PDT) From: Martin Blumenstingl To: linux-amlogic@lists.infradead.org, khilman@baylibre.com Subject: [PATCH 0/2] ARM: dts: meson8b/m2: RGMII improvements Date: Tue, 12 May 2020 23:51:46 +0200 Message-Id: <20200512215148.540322-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200512_145159_879866_388BBC4A X-CRM114-Status: GOOD ( 13.08 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Martin Blumenstingl , andrew@lunn.ch, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org Hi Kevin, the fist patch in this series connects FCLK_DIV2 to the PRG_ETH "additional" registers for the dwmac Ethernet controller. Now that we know how RGMII and FCLK_DIV2 are connected we can add this dependency to get rid of CLK_IS_CRITICAL for FCLK_DIV2 at some point. The second patch fixes the RX and TX delay. The 4ns TX delay which we have used so far is incorrect and only worked because we were using an unsupported clock divider in the PRG_ETH registers. That divider has been fixed with commit bd6f48546b9c ("net: stmmac: dwmac-meson8b: Fix the RGMII TX delay on Meson8b/8m2 SoCs"). Instead of "just" fixing the TX delay we can even do better and switch to phy-mode = "rgmii-id" to let the PHY generate the RX and TX delay. However, previously we didn't know that there was an RX delay applied by the MAC on these boards. Only the additional information from Jianxin in the other series [0] made us aware of this. Without the other series there will be a 4ns RX delay (2ns from the MAC and additional 2ns from the PHY). Due to this dependency I did not add a Fixes tag, because backporting these .dts patches without their runtime dependency will break stable kernels. TL;DR: Ethernet TX throughput on my Odroid-C1 improved from <200Mbit/s to >700Mbit/s (measured with iperf3) Dependencies: This series has a runtime dependency on v7 of the series called "dwmac-meson8b Ethernet RX delay configuration" [0] [0] https://patchwork.kernel.org/cover/11543997/ Martin Blumenstingl (2): ARM: dts: meson: Add the Ethernet "timing-adjustment" clock ARM: dts: meson: Switch existing boards with RGMII PHY to "rgmii-id" arch/arm/boot/dts/meson8b-odroidc1.dts | 3 +-- arch/arm/boot/dts/meson8b.dtsi | 5 +++-- arch/arm/boot/dts/meson8m2-mxiii-plus.dts | 4 +--- arch/arm/boot/dts/meson8m2.dtsi | 5 +++-- 4 files changed, 8 insertions(+), 9 deletions(-) -- 2.26.2 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic