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[2003:f1:3713:2e00:428d:5cff:feb9:9db8]) by smtp.googlemail.com with ESMTPSA id r11sm5296211wma.35.2020.05.15.13.47.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 15 May 2020 13:47:42 -0700 (PDT) From: Martin Blumenstingl To: khilman@baylibre.com, linux-amlogic@lists.infradead.org Subject: [PATCH v4 0/4] meson-ee-pwrc: support for Meson8/8b/8m2 and GX Date: Fri, 15 May 2020 22:47:05 +0200 Message-Id: <20200515204709.1505498-1-martin.blumenstingl@googlemail.com> X-Mailer: git-send-email 2.26.2 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200515_134744_666545_4766A346 X-CRM114-Status: GOOD ( 13.62 ) X-BeenThere: linux-amlogic@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, narmstrong@baylibre.com, Martin Blumenstingl , linux-kernel@vger.kernel.org, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-amlogic" Errors-To: linux-amlogic-bounces+linux-amlogic=archiver.kernel.org@lists.infradead.org This series adds support for all "older" SoCs to the meson-ee-pwrc driver. I wanted to compare as much as I could between my Meson8b EC-100 (Endless Mini) and the Le Potato board so I added support for GXBB, GXL and GXM as well as for the SoCs that I'm actually working on. I will send the ARM64 dts patches once all of this is reviewed and merged. I successfully tested the Meson8b part on EC-100 where u-boot does not initialize the VPU controller. So this the board where I have been struggling most. Kevin, I'm not sure if this can still make it into v5.8. If the series as a whole can't make it for some reason then I'd appreciate if patches #1 and #2 could end in v5.8 so I can push the .dts patches for v5.9. Changes since v3 at [2]: - added Rob's Reviewed-by to patches #1 and #2 - thank you! - add a GX_ prefix to AO_RTI_GEN_PWR_{SLEEP0,ISO} and add new #defines for MESON8_AO_RTI_GEN_PWR_{SLEEP0,ISO} based on Neil's suggestion. - rename meson8_pwrc_mem_eth to meson_pwrc_mem_eth as suggested by Neil (thanks!) because it's the same for all platforms - rename gxbb_pwrc_vpu to gx_pwrc_vpu as suggested by Neil (thanks) - added Neil's Reviewed-by to patches #3 and #4 Changes since v2 at [1]: - don't remove the "reset-names" property from the main description (only make it optional and switch from items to minItems) to fix a dt_binding_check found by Rob (or his bot) - thanks and sorry! Changes since v1 at [0]: - rename PWRC_GXBB_ETH_ID to PWRC_GXBB_ETHERNET_MEM_ID. Spotted by Neil, thanks! - update cover-letter since Neil confirmed (thanks!) that the "dvin" reset really belongs to the VPU on GXBB, GXL and GXM - removed RFC status [0] https://patchwork.kernel.org/cover/11489163/ [1] https://patchwork.kernel.org/cover/11496013/ [2] https://patchwork.kernel.org/cover/11499791/ Martin Blumenstingl (4): dt-bindings: power: meson-ee-pwrc: add support for Meson8/8b/8m2 dt-bindings: power: meson-ee-pwrc: add support for the Meson GX SoCs soc: amlogic: meson-ee-pwrc: add support for Meson8/Meson8b/Meson8m2 soc: amlogic: meson-ee-pwrc: add support for the Meson GX SoCs .../bindings/power/amlogic,meson-ee-pwrc.yaml | 102 +++++++++++++--- drivers/soc/amlogic/meson-ee-pwrc.c | 112 ++++++++++++++++-- include/dt-bindings/power/meson-gxbb-power.h | 13 ++ include/dt-bindings/power/meson8-power.h | 13 ++ 4 files changed, 214 insertions(+), 26 deletions(-) create mode 100644 include/dt-bindings/power/meson-gxbb-power.h create mode 100644 include/dt-bindings/power/meson8-power.h -- 2.26.2 _______________________________________________ linux-amlogic mailing list linux-amlogic@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-amlogic